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/*-
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 * Copyright (c) 2005-2007, Kohsuke Ohtani
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * 1. Redistributions of source code must retain the above copyright
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 *    notice, this list of conditions and the following disclaimer.
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 * 2. Redistributions in binary form must reproduce the above copyright
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 *    notice, this list of conditions and the following disclaimer in the
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 *    documentation and/or other materials provided with the distribution.
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 * 3. Neither the name of the author nor the names of any co-contributors
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 *    may be used to endorse or promote products derived from this software
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 *    without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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 * SUCH DAMAGE.
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 */
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/*
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 * interrupt.c - interrupt handling routines for GBA
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 */
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#include <sys/ipl.h>
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#include <kernel.h>
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#include <hal.h>
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#include <irq.h>
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#include <locore.h>
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#include <cpufunc.h>
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#include <context.h>
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/* Number of IRQ lines */
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#define NIRQS                14
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/* Interrupt hook vector */
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#define IRQ_VECTOR        *(uint32_t *)0x3007ffc
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/* Registers for interrupt control unit - enable/flag/master */
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#define ICU_IE                (*(volatile uint16_t *)0x4000200)
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#define ICU_IF                (*(volatile uint16_t *)0x4000202)
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#define ICU_IME                (*(volatile uint16_t *)0x4000208)
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/* ICU_IE */
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#define IRQ_VALID        0x3fff
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/* ICU_IME */
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#define IRQ_OFF                0
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#define IRQ_ON                1
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/*
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 * Interrupt priority level
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 *
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 * Each interrupt has its logical priority level, with 0 being
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 * the lowest priority. While some ISR is running, all lower
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 * priority interrupts are masked off.
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 */
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volatile int irq_level;
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/*
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 * Interrupt mapping table
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 */
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static int ipl_table[NIRQS];                /* Vector -> level */
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static uint16_t mask_table[NIPLS];        /* Level -> mask */
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/*
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 * Set mask for current ipl
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 */
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#define update_mask()        ICU_IE = mask_table[irq_level]
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/*
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 * Unmask interrupt in PIC for specified irq.
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 * The interrupt mask table is also updated.
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 * Assumes CPU interrupt is disabled in caller.
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 */
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void
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interrupt_unmask(int vector, int level)
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{
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        int i;
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        uint16_t unmask = (uint16_t)1 << vector;
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        /* Save level mapping */
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        ipl_table[vector] = level;
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        /*
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         * Unmask target interrupt for all
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         * lower interrupt levels.
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         */
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        for (i = 0; i < level; i++)
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                mask_table[i] |= unmask;
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        update_mask();
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}
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/*
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 * Mask interrupt in PIC for specified irq.
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 * Interrupt must be disabled when this routine is called.
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 */
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void
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interrupt_mask(int vector)
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{
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        int i, level;
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        u_int mask = (uint16_t)~(1 << vector);
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        level = ipl_table[vector];
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        for (i = 0; i < level; i++)
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                mask_table[i] &= mask;
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        ipl_table[vector] = IPL_NONE;
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        update_mask();
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}
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/*
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 * Setup interrupt mode.
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 * Select whether an interrupt trigger is edge or level.
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 */
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void
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interrupt_setup(int vector, int mode)
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{
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        /* nop */
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}
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/*
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 * Dispatch interrupt
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 */
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void
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interrupt_dispatch(int vector)
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{
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        int old_ipl;
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        /* Save & update interrupt level */
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        old_ipl = irq_level;
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        irq_level = ipl_table[vector];
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        update_mask();
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        /* Send acknowledge to ICU for this irq */
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        ICU_IF = (uint16_t)(1 << vector);
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        /* Allow another interrupt that has higher priority */
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        splon();
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        /* Dispatch interrupt */
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        irq_handler(vector);
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        sploff();
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        /* Restore interrupt level */
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        irq_level = old_ipl;
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        update_mask();
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}
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/*
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 * Common interrupt handler.
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 */
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void
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interrupt_handler(void)
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{
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        uint16_t bits;
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        int vector;
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        bits = ICU_IF;
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retry:
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        for (vector = 0; vector < NIRQS; vector++) {
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                if (bits & (uint16_t)(1 << vector))
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                        break;
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        }
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        if (vector == NIRQS)
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                goto out;
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        interrupt_dispatch(vector);
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        /*
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         * Multiple interrupts can be fired in case of GBA.
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         * So, we have to check the interrupt status, again.
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         */
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        bits = ICU_IF;
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        if (bits & IRQ_VALID)
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                goto retry;
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out:
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        return;
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}
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/*
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 * Initialize interrupt controllers.
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 * All interrupts will be masked off.
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 */
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void
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interrupt_init(void)
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{
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        int i;
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        irq_level = IPL_NONE;
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        for (i = 0; i < NIRQS; i++)
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                ipl_table[i] = IPL_NONE;
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        for (i = 0; i < NIPLS; i++)
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                mask_table[i] = 0;
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        ICU_IME = IRQ_OFF;
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        /*
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         * Since GBA has its own interrupt vector in ROM area,
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         * we can not modify it. Instead, the GBA BIOS will
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         * call the user's interrupt hook routine placed in
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         * the address in 0x3007ffc.
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         */
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        IRQ_VECTOR = (uint32_t)interrupt_entry; /* Interrupt hook address */
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        ICU_IE = 0;                        /* Mask all interrupts */
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        ICU_IME = IRQ_ON;
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}