root / freemodbus / port / port.h @ 20e5429c
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1 | 20e5429c | Tom Mullins | /*
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2 | * FreeModbus Libary: AVR Port
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3 | * Copyright (C) 2006 Christian Walter <wolti@sil.at>
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4 | * - Initial version + ATmega168 support
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5 | * Modfications Copyright (C) 2006 Tran Minh Hoang:
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6 | * - ATmega8, ATmega16, ATmega32 support
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7 | * - RS485 support for DS75176
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8 | *
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9 | * This library is free software; you can redistribute it and/or
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10 | * modify it under the terms of the GNU Lesser General Public
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11 | * License as published by the Free Software Foundation; either
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12 | * version 2.1 of the License, or (at your option) any later version.
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13 | *
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14 | * This library is distributed in the hope that it will be useful,
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15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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17 | * Lesser General Public License for more details.
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18 | *
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19 | * You should have received a copy of the GNU Lesser General Public
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20 | * License along with this library; if not, write to the Free Software
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21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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22 | *
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23 | * File: $Id: port.h,v 1.6 2006/09/17 16:45:52 wolti Exp $
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24 | */
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25 | |||
26 | #ifndef _PORT_H
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27 | #define _PORT_H
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28 | |||
29 | /* ----------------------- Platform includes --------------------------------*/
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30 | |||
31 | #include <avr/io.h> |
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32 | #include <avr/interrupt.h> |
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33 | |||
34 | /* ----------------------- Defines ------------------------------------------*/
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35 | #define INLINE inline |
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36 | #define PR_BEGIN_EXTERN_C extern "C" { |
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37 | #define PR_END_EXTERN_C }
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38 | |||
39 | #define ENTER_CRITICAL_SECTION( ) cli()
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40 | #define EXIT_CRITICAL_SECTION( ) sei()
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41 | |||
42 | #define assert( x )
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43 | |||
44 | typedef char BOOL; |
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45 | |||
46 | typedef unsigned char UCHAR; |
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47 | typedef char CHAR; |
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48 | |||
49 | typedef unsigned short USHORT; |
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50 | typedef short SHORT; |
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51 | |||
52 | typedef unsigned long ULONG; |
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53 | typedef long LONG; |
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54 | |||
55 | #ifndef TRUE
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56 | #define TRUE 1 |
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57 | #endif
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58 | |||
59 | #ifndef FALSE
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60 | #define FALSE 0 |
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61 | #endif
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62 | |||
63 | /* ----------------------- AVR platform specifics ---------------------------*/
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64 | |||
65 | #if defined (__AVR_ATmega168__)
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66 | #define UCSRB UCSR0B
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67 | #define TXEN TXEN0
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68 | #define RXEN RXEN0
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69 | #define RXCIE RXCIE0
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70 | #define TXCIE TXCIE0
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71 | #define UDRE UDRE0
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72 | #define UBRR UBRR0
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73 | #define UCSRC UCSR0C
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74 | #define UPM1 UPM01
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75 | #define UPM0 UPM00
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76 | #define UCSZ0 UCSZ00
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77 | #define UCSZ1 UCSZ01
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78 | #define UDR UDR0
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79 | #define SIG_UART_TRANS SIG_USART_TRANS
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80 | |||
81 | #elif defined (__AVR_ATmega169__)
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82 | |||
83 | #define SIG_UART_TRANS SIG_USART_TRANS
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84 | |||
85 | #elif defined (__AVR_ATmega8__)
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86 | #define UBRR UBRRL
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87 | #define TCCR1C TCCR1A /* dummy */ |
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88 | #define TIMSK1 TIMSK
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89 | #define TIFR1 TIFR
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90 | #define SIG_USART_DATA SIG_UART_DATA
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91 | #define SIG_USART_RECV SIG_UART_RECV
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92 | |||
93 | #elif defined (__AVR_ATmega16__)
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94 | #define UBRR UBRRL
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95 | #define TCCR1C TCCR1A /* dummy */ |
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96 | #define TIMSK1 TIMSK
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97 | #define TIFR1 TIFR
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98 | |||
99 | #elif defined (__AVR_ATmega32__)
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100 | #define UBRR UBRRL
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101 | #define TCCR1C TCCR1A /* dummy */ |
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102 | #define TIMSK1 TIMSK
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103 | #define TIFR1 TIFR
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104 | |||
105 | #elif defined (__AVR_ATmega128__)
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106 | #define UCSRB UCSR0B
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107 | #define UBRR UBRR0L
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108 | #define UDR UDR0
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109 | #define TIMSK1 TIMSK
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110 | #define TIFR1 TIFR
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111 | #define SIG_UART_TRANS SIG_USART0_TRANS
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112 | #define SIG_USART_DATA SIG_USART0_DATA
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113 | #define SIG_USART_RECV SIG_USART0_RECV
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114 | #define UCSZ0 UCSZ00
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115 | #define UCSZ1 UCSZ01
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116 | #define UPM0 UPM00
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117 | #define UPM1 UPM01
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118 | #define UCSRC UCSR0C
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119 | |||
120 | #elif defined (__AVR_ATtiny1634__)
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121 | #define UCSRB UCSR0B
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122 | #define UBRR UBRR0L
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123 | #define UDR UDR0
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124 | #define UDRE UDRE0
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125 | #define TIMSK1 TIMSK
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126 | #define TIFR1 TIFR
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127 | #define UCSZ0 UCSZ00
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128 | #define UCSZ1 UCSZ01
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129 | #define UPM0 UPM00
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130 | #define UPM1 UPM01
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131 | #define UCSRC UCSR0C
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132 | #define SIG_UART_TRANS USART0_TX_vect
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133 | #define SIG_USART_DATA USART0_UDRE_vect
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134 | #define SIG_USART_RECV USART0_RX_vect
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135 | #define SIG_OUTPUT_COMPARE1A TIMER1_COMPA_vect
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136 | |||
137 | #define RXEN RXEN0
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138 | #define RXCIE RXCIE0
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139 | #define TXEN TXEN0
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140 | #define TXCIE TXCIE0
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141 | |||
142 | #endif
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143 | |||
144 | /* ----------------------- RS485 specifics ----------------------------------*/
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145 | #ifdef RTS_ENABLE
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146 | |||
147 | #define RTS_PIN PC2
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148 | #define RTS_DDR DDRC
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149 | #define RTS_PORT PORTC
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150 | |||
151 | #define RTS_INIT \
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152 | do { \
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153 | RTS_DDR |= _BV( RTS_PIN ); \ |
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154 | RTS_PORT &= ~( _BV( RTS_PIN ) ); \ |
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155 | } while( 0 ); |
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156 | |||
157 | #define RTS_HIGH \
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158 | do { \
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159 | RTS_PORT |= _BV( RTS_PIN ); \ |
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160 | } while( 0 ); |
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161 | |||
162 | #define RTS_LOW \
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163 | do { \
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164 | RTS_PORT &= ~( _BV( RTS_PIN ) ); \ |
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165 | } while( 0 ); |
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166 | |||
167 | #endif
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168 | |||
169 | #endif
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