Project

General

Profile

Revision 07718da3

ID07718da3dcbf643e6c8e28198fa5e7b177611a49
Parent e53aa5c5
Child 4e6334de

Added by Thomas Mullins over 11 years ago

Fixed problem with high error in serial clock

View differences:

toolbox/freemodbus/port/port.h
119 119

  
120 120
#elif defined (__AVR_ATtiny1634__)
121 121
#define UCSRB           UCSR0B
122
#define UBRR            UBRR0L
122
#define UBRR            UBRR0
123 123
#define UDR             UDR0
124 124
#define UDRE            UDRE0
125 125
#define TIMSK1          TIMSK
......
128 128
#define UCSZ1           UCSZ01
129 129
#define UPM0            UPM00
130 130
#define UPM1            UPM01
131
#define UCSRA           UCSR0A
132
#define U2X             U2X0
131 133
#define UCSRC           UCSR0C
132 134
#define SIG_UART_TRANS  USART0_TX_vect
133 135
#define SIG_USART_DATA  USART0_UDRE_vect
toolbox/freemodbus/port/portserial.c
33 33
#include "mb.h"
34 34
#include "mbport.h"
35 35

  
36
#define UART_BAUD_RATE          9600
36
#ifdef __AVR_ATtiny1634__
37
#define UART_BAUD_CALC(UART_BAUD_RATE,F_OSC) \
38
    ( ( F_OSC ) / ( ( UART_BAUD_RATE ) * 8UL ) - 1 )
39
#else
37 40
#define UART_BAUD_CALC(UART_BAUD_RATE,F_OSC) \
38 41
    ( ( F_OSC ) / ( ( UART_BAUD_RATE ) * 16UL ) - 1 )
39

  
40
//#define UART_UCSRB  UCSR0B
42
#endif
41 43

  
42 44
void
43 45
vMBPortSerialEnable( BOOL xRxEnable, BOOL xTxEnable )
......
115 117
#elif defined (__AVR_ATmega128__)
116 118
    UCSRC |= ucUCSRC;
117 119
#elif defined (__AVR_ATtiny1634__)
120
    UCSRA |= _BV(U2X);
118 121
    UCSRC |= ucUCSRC;
119 122
#endif
120 123

  

Also available in: Unified diff