diff -rupN u-boot-2012.07.orig/board/overo/overo.h u-boot-2012.07/board/overo/overo.h
--- u-boot-2012.07.orig/board/overo/overo.h	2012-12-08 20:32:40.707945524 -0500
+++ u-boot-2012.07/board/overo/overo.h	2012-12-08 21:03:39.231867005 -0500
@@ -136,34 +136,34 @@ const omap3_sysinfo sysinfo = {
 								 /* - SMSC911X_NRES*/\
 	MUX_VAL(CP(GPMC_WAIT3),		(IEN  | PTU | DIS | M4)) /*GPIO_65*/\
  /*DSS*/\
-	MUX_VAL(CP(DSS_PCLK),		(IDIS | PTD | DIS | M0)) /*DSS_PCLK*/\
-	MUX_VAL(CP(DSS_HSYNC),		(IDIS | PTD | DIS | M0)) /*DSS_HSYNC*/\
-	MUX_VAL(CP(DSS_VSYNC),		(IDIS | PTD | DIS | M0)) /*DSS_VSYNC*/\
-	MUX_VAL(CP(DSS_ACBIAS),		(IDIS | PTD | DIS | M0)) /*DSS_ACBIAS*/\
-	MUX_VAL(CP(DSS_DATA0),		(IDIS | PTD | DIS | M0)) /*DSS_DATA0*/\
-	MUX_VAL(CP(DSS_DATA1),		(IDIS | PTD | DIS | M0)) /*DSS_DATA1*/\
-	MUX_VAL(CP(DSS_DATA2),		(IDIS | PTD | DIS | M0)) /*DSS_DATA2*/\
-	MUX_VAL(CP(DSS_DATA3),		(IDIS | PTD | DIS | M0)) /*DSS_DATA3*/\
-	MUX_VAL(CP(DSS_DATA4),		(IDIS | PTD | DIS | M0)) /*DSS_DATA4*/\
-	MUX_VAL(CP(DSS_DATA5),		(IDIS | PTD | DIS | M0)) /*DSS_DATA5*/\
-	MUX_VAL(CP(DSS_DATA6),		(IDIS | PTD | DIS | M0)) /*DSS_DATA6*/\
-	MUX_VAL(CP(DSS_DATA7),		(IDIS | PTD | DIS | M0)) /*DSS_DATA7*/\
-	MUX_VAL(CP(DSS_DATA8),		(IDIS | PTD | DIS | M0)) /*DSS_DATA8*/\
-	MUX_VAL(CP(DSS_DATA9),		(IDIS | PTD | DIS | M0)) /*DSS_DATA9*/\
-	MUX_VAL(CP(DSS_DATA10),		(IDIS | PTD | DIS | M0)) /*DSS_DATA10*/\
-	MUX_VAL(CP(DSS_DATA11),		(IDIS | PTD | DIS | M0)) /*DSS_DATA11*/\
-	MUX_VAL(CP(DSS_DATA12),		(IDIS | PTD | DIS | M0)) /*DSS_DATA12*/\
-	MUX_VAL(CP(DSS_DATA13),		(IDIS | PTD | DIS | M0)) /*DSS_DATA13*/\
-	MUX_VAL(CP(DSS_DATA14),		(IDIS | PTD | DIS | M0)) /*DSS_DATA14*/\
-	MUX_VAL(CP(DSS_DATA15),		(IDIS | PTD | DIS | M0)) /*DSS_DATA15*/\
-	MUX_VAL(CP(DSS_DATA16),		(IDIS | PTD | DIS | M0)) /*DSS_DATA16*/\
-	MUX_VAL(CP(DSS_DATA17),		(IDIS | PTD | DIS | M0)) /*DSS_DATA17*/\
-	MUX_VAL(CP(DSS_DATA18),		(IDIS | PTD | DIS | M0)) /*DSS_DATA18*/\
-	MUX_VAL(CP(DSS_DATA19),		(IDIS | PTD | DIS | M0)) /*DSS_DATA19*/\
-	MUX_VAL(CP(DSS_DATA20),		(IDIS | PTD | DIS | M0)) /*DSS_DATA20*/\
-	MUX_VAL(CP(DSS_DATA21),		(IDIS | PTD | DIS | M0)) /*DSS_DATA21*/\
-	MUX_VAL(CP(DSS_DATA22),		(IDIS | PTD | DIS | M0)) /*DSS_DATA22*/\
-	MUX_VAL(CP(DSS_DATA23),		(IDIS | PTD | DIS | M0)) /*DSS_DATA23*/\
+	MUX_VAL(CP(DSS_PCLK),		(IEN  | PTD | DIS | M4)) /*GPIO_66*/\
+	MUX_VAL(CP(DSS_HSYNC),		(IEN  | PTD | DIS | M4)) /*GPIO_67*/\
+	MUX_VAL(CP(DSS_VSYNC),		(IEN  | PTD | DIS | M4)) /*GPIO_68*/\
+	MUX_VAL(CP(DSS_ACBIAS),		(IEN  | PTD | DIS | M4)) /*GPIO_69*/\
+	MUX_VAL(CP(DSS_DATA0),		(IEN  | PTD | DIS | M4)) /*GPIO_70*/\
+	MUX_VAL(CP(DSS_DATA1),		(IEN  | PTD | DIS | M4)) /*GPIO_71*/\
+	MUX_VAL(CP(DSS_DATA2),		(IEN  | PTD | DIS | M4)) /*GPIO_72*/\
+	MUX_VAL(CP(DSS_DATA3),		(IEN  | PTD | DIS | M4)) /*GPIO_73*/\
+	MUX_VAL(CP(DSS_DATA4),		(IEN  | PTD | DIS | M4)) /*GPIO_74*/\
+	MUX_VAL(CP(DSS_DATA5),		(IEN  | PTD | DIS | M4)) /*GPIO_75*/\
+	MUX_VAL(CP(DSS_DATA6),		(IEN  | PTD | DIS | M4)) /*GPIO_76*/\
+	MUX_VAL(CP(DSS_DATA7),		(IEN  | PTD | DIS | M4)) /*GPIO_77*/\
+	MUX_VAL(CP(DSS_DATA8),		(IEN  | PTD | DIS | M4)) /*GPIO_78*/\
+	MUX_VAL(CP(DSS_DATA9),		(IEN  | PTD | DIS | M4)) /*GPIO_79*/\
+	MUX_VAL(CP(DSS_DATA10),		(IEN  | PTD | DIS | M4)) /*GPIO_80*/\
+	MUX_VAL(CP(DSS_DATA11),		(IEN  | PTD | DIS | M4)) /*GPIO_81*/\
+	MUX_VAL(CP(DSS_DATA12),		(IEN  | PTD | DIS | M4)) /*GPIO_82*/\
+	MUX_VAL(CP(DSS_DATA13),		(IEN  | PTD | DIS | M4)) /*GPIO_83*/\
+	MUX_VAL(CP(DSS_DATA14),		(IEN  | PTD | DIS | M4)) /*GPIO_84*/\
+	MUX_VAL(CP(DSS_DATA15),		(IEN  | PTD | DIS | M4)) /*GPIO_85*/\
+	MUX_VAL(CP(DSS_DATA16),		(IEN  | PTD | DIS | M4)) /*GPIO_86*/\
+	MUX_VAL(CP(DSS_DATA17),		(IEN  | PTD | DIS | M4)) /*GPIO_87*/\
+	MUX_VAL(CP(DSS_DATA18),		(IEN  | PTD | DIS | M4)) /*GPIO_88*/\
+	MUX_VAL(CP(DSS_DATA19),		(IEN  | PTD | DIS | M4)) /*GPIO_89*/\
+	MUX_VAL(CP(DSS_DATA20),		(IEN  | PTD | DIS | M4)) /*GPIO_90*/\
+	MUX_VAL(CP(DSS_DATA21),		(IEN  | PTD | DIS | M4)) /*GPIO_91*/\
+	MUX_VAL(CP(DSS_DATA22),		(IEN  | PTD | DIS | M4)) /*GPIO_92*/\
+	MUX_VAL(CP(DSS_DATA23),		(IEN  | PTD | DIS | M4)) /*GPIO_93*/\
  /*CAMERA*/\
 	MUX_VAL(CP(CAM_HS),		(IEN  | PTU | DIS | M0)) /*CAM_HS */\
 	MUX_VAL(CP(CAM_VS),		(IEN  | PTU | DIS | M0)) /*CAM_VS */\
@@ -222,10 +222,10 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(MCBSP3_DR),		(IDIS | PTD | DIS | M1)) /*UART2_RTS*/\
 	MUX_VAL(CP(MCBSP3_CLKX),	(IDIS | PTD | DIS | M1)) /*UART2_TX*/\
 	MUX_VAL(CP(MCBSP3_FSX),		(IEN  | PTD | DIS | M1)) /*UART2_RX*/\
-	MUX_VAL(CP(UART2_CTS),		(IEN  | PTD | DIS | M4)) /*GPIO_144 - LCD_EN*/\
-	MUX_VAL(CP(UART2_RTS),		(IEN  | PTD | DIS | M4)) /*GPIO_145*/\
-	MUX_VAL(CP(UART2_TX),		(IEN  | PTD | DIS | M4)) /*GPIO_146*/\
-	MUX_VAL(CP(UART2_RX),		(IEN  | PTD | DIS | M4)) /*GPIO_147*/\
+	MUX_VAL(CP(UART2_CTS),		(IDIS | PTD | DIS | M2)) /*GPT9_PWM_EVT*/\
+	MUX_VAL(CP(UART2_RTS),		(IDIS | PTD | DIS | M2)) /*GPT10_PWM_EVT*/\
+	MUX_VAL(CP(UART2_TX),		(IDIS | PTD | DIS | M2)) /*GPT11_PWM_EVT*/\
+	MUX_VAL(CP(UART2_RX),		(IDIS | PTD | DIS | M2)) /*GPT8_PWM_EVT*/\
 	MUX_VAL(CP(UART1_TX),		(IDIS | PTD | DIS | M0)) /*UART1_TX*/\
 	MUX_VAL(CP(UART1_RTS),		(IEN  | PTU | DIS | M4)) /*GPIO_149*/ \
 	MUX_VAL(CP(UART1_CTS),		(IEN  | PTU | DIS | M4)) /*GPIO_150-MMC3_WP*/\