Revision 812788aa
ID | 812788aa5bc592cf417de345fdd8a74933d7a0c8 |
Moved some sensors to different timers
Most notably, change the ROS millisecond counter to share the BOM 38 kHz
timer instead of having its own. The range sensor and BOM rx will now
share timer 5, but they both have to be fixed for the higher F_CPU.
scout_avr/src/Atmega128rfa1.cpp | ||
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#include "Atmega128rfa1.h" |
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#include "bom.h" |
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extern "C" |
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{ |
... | ... | |
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void __cxa_pure_virtual(void) {} |
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} |
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#define T0_KHZ 76 |
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#define T0_OCR (F_CPU / 1000 / T0_KHZ) // 210 ticks |
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#define T0_ERROR (F_CPU / 1000 - T0_OCR*T0_KHZ) // 40 ticks/ms |
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unsigned char t0_count, t0_error; |
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unsigned long millis; |
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int rx_start = 0, rx_end = 0; |
... | ... | |
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ISR(TIMER0_COMPA_vect) |
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{ |
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millis++; |
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bom_isr(); |
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// F_CPU = T0_OCR * T0_KHZ + T0_ERROR |
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// every millisecond, accumulate T0_ERROR, and when it reaches T0_OCR skip |
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// one iteration |
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t0_count++; |
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if (t0_count >= T0_KHZ) { |
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t0_error += T0_ERROR; |
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if (t0_error < T0_OCR) { |
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t0_count = 0; |
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} else { |
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t0_count = -1; |
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t0_error -= T0_OCR; |
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} |
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millis++; |
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} |
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} |
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ISR(USART0_RX_vect) |
... | ... | |
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// === init time === |
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// COM0x = 0, pin OC0x not used |
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// WGM0 = 2, clear timer on compare match, TOP = OCRA |
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// CS0 = 3, 64 prescaler
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// CS0 = 1, no prescaler
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TCCR0A = _BV(WGM01); |
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TCCR0B = _BV(CS01) | _BV(CS00);
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TCCR0B = _BV(CS00); |
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// enable interrupt on compare match A |
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TIMSK0 = _BV(OCIE0A); |
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// 1 ms with 1/64 prescaler |
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OCR0A = F_CPU / 1000 / 64; |
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OCR0A = T0_OCR; |
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millis = 0; |
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sei(); |
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