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1 | 80 | bneuman | // This file has been prepared for Doxygen automatic documentation generation.
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2 | /*! \file ********************************************************************
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3 | *
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4 | * Atmel Corporation
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5 | *
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6 | * File : USI_TWI_Slave.h
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7 | * Compiler : IAR EWAAVR 4.11A
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8 | * Revision : $Revision: 1.14 $
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9 | * Date : $Date: Friday, December 09, 2005 17:25:38 UTC $
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10 | * Updated by : $Author: jtyssoe $
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11 | *
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12 | * Support mail : avr@atmel.com
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13 | *
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14 | * Supported devices : All device with USI module can be used.
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15 | * The example is written for the ATmega169, ATtiny26 & ATtiny2313
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16 | *
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17 | * AppNote : AVR312 - Using the USI module as a TWI slave
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18 | *
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19 | * Description : Header file for USI_TWI driver
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20 | *
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21 | *
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22 | *
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23 | ****************************************************************************/
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24 | |||
25 | |||
26 | |||
27 | //! Prototypes
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28 | void USI_TWI_Slave_Initialise( unsigned char ); |
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29 | void USI_TWI_Transmit_Byte( unsigned char ); |
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30 | unsigned char USI_TWI_Receive_Byte( void ); |
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31 | unsigned char USI_TWI_Data_In_Receive_Buffer( void ); |
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32 | void Timer_Init(void); |
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33 | |||
34 | #define TRUE 1 |
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35 | #define FALSE 0 |
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36 | |||
37 | typedef unsigned char uint8_t; |
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38 | |||
39 | //////////////////////////////////////////////////////////////////
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40 | ///////////////// Driver Buffer Definitions //////////////////////
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41 | //////////////////////////////////////////////////////////////////
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42 | // 1,2,4,8,16,32,64,128 or 256 bytes are allowed buffer sizes
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43 | |||
44 | #define TWI_RX_BUFFER_SIZE (16) |
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45 | #define TWI_RX_BUFFER_MASK ( TWI_RX_BUFFER_SIZE - 1 ) |
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46 | |||
47 | #if ( TWI_RX_BUFFER_SIZE & TWI_RX_BUFFER_MASK )
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48 | #error TWI RX buffer size is not a power of 2 |
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49 | #endif
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50 | |||
51 | // 1,2,4,8,16,32,64,128 or 256 bytes are allowed buffer sizes
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52 | |||
53 | #define TWI_TX_BUFFER_SIZE (16) |
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54 | #define TWI_TX_BUFFER_MASK ( TWI_TX_BUFFER_SIZE - 1 ) |
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55 | |||
56 | #if ( TWI_TX_BUFFER_SIZE & TWI_TX_BUFFER_MASK )
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57 | #error TWI TX buffer size is not a power of 2 |
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58 | #endif
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59 | |||
60 | |||
61 | |||
62 | #define USI_SLAVE_CHECK_ADDRESS (0x00) |
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63 | #define USI_SLAVE_SEND_DATA (0x01) |
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64 | #define USI_SLAVE_REQUEST_REPLY_FROM_SEND_DATA (0x02) |
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65 | #define USI_SLAVE_CHECK_REPLY_FROM_SEND_DATA (0x03) |
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66 | #define USI_SLAVE_REQUEST_DATA (0x04) |
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67 | #define USI_SLAVE_GET_DATA_AND_SEND_ACK (0x05) |
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68 | |||
69 | #define DDR_USI DDRB
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70 | #define PORT_USI PORTB
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71 | #define PIN_USI PINB
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72 | #define PORT_USI_SDA PORTB0
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73 | #define PORT_USI_SCL PORTB2
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74 | #define PIN_USI_SDA PINB0
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75 | #define PIN_USI_SCL PINB2
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76 | #define USI_START_COND_INT USISIF
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77 | #define USI_START_VECTOR USI_START_vect
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78 | #define USI_OVERFLOW_VECTOR USI_OVF_vect
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79 | |||
80 | |||
81 | //! Functions implemented as macros
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82 | #define SET_USI_TO_SEND_ACK() \
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83 | { \ |
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84 | USIDR = 0; /* Prepare ACK */ \ |
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85 | DDR_USI |= (1<<PORT_USI_SDA); /* Set SDA as output */ \ |
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86 | USISR = (0<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)| /* Clear all flags, except Start Cond */ \ |
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87 | (0x0E<<USICNT0); /* set USI counter to shift 1 bit. */ \ |
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88 | } |
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89 | |||
90 | #define SET_USI_TO_READ_ACK() \
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91 | { \ |
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92 | DDR_USI &= ~(1<<PORT_USI_SDA); /* Set SDA as intput */ \ |
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93 | USIDR = 0; /* Prepare ACK */ \ |
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94 | USISR = (0<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)| /* Clear all flags, except Start Cond */ \ |
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95 | (0x0E<<USICNT0); /* set USI counter to shift 1 bit. */ \ |
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96 | } |
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97 | |||
98 | #define SET_USI_TO_TWI_START_CONDITION_MODE() \
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99 | { \ |
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100 | USICR = (1<<USISIE)|(0<<USIOIE)| /* Enable Start Condition Interrupt. Disable Overflow Interrupt.*/ \ |
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101 | (1<<USIWM1)|(0<<USIWM0)| /* Set USI in Two-wire mode. No USI Counter overflow hold. */ \ |
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102 | (1<<USICS1)|(0<<USICS0)|(0<<USICLK)| /* Shift Register Clock Source = External, positive edge */ \ |
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103 | (0<<USITC); \
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104 | USISR = (0<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)| /* Clear all flags, except Start Cond */ \ |
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105 | (0x0<<USICNT0); \
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106 | } |
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107 | |||
108 | #define SET_USI_TO_SEND_DATA() \
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109 | { \ |
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110 | DDR_USI |= (1<<PORT_USI_SDA); /* Set SDA as output */ \ |
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111 | USISR = (0<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)| /* Clear all flags, except Start Cond */ \ |
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112 | (0x0<<USICNT0); /* set USI to shift out 8 bits */ \ |
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113 | } |
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114 | |||
115 | #define SET_USI_TO_READ_DATA() \
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116 | { \ |
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117 | DDR_USI &= ~(1<<PORT_USI_SDA); /* Set SDA as input */ \ |
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118 | USISR = (0<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)| /* Clear all flags, except Start Cond */ \ |
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119 | (0x0<<USICNT0); /* set USI to shift out 8 bits */ \ |
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120 | } |