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// This file has been prepared for Doxygen automatic documentation generation.
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/*! \file ********************************************************************
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*
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* Atmel Corporation
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*
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* File : USI_TWI_Slave.h
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* Compiler : IAR EWAAVR 4.11A
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* Revision : $Revision: 1.14 $
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* Date : $Date: Friday, December 09, 2005 17:25:38 UTC $
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* Updated by : $Author: jtyssoe $
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*
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* Support mail : avr@atmel.com
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*
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* Supported devices : All device with USI module can be used.
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* The example is written for the ATmega169, ATtiny26 & ATtiny2313
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*
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* AppNote : AVR312 - Using the USI module as a TWI slave
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*
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* Description : Header file for USI_TWI driver
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*
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*
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*
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****************************************************************************/
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//! Prototypes
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void USI_TWI_Slave_Initialise( unsigned char ); |
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void USI_TWI_Transmit_Byte( unsigned char ); |
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unsigned char USI_TWI_Receive_Byte( void ); |
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unsigned char USI_TWI_Data_In_Receive_Buffer( void ); |
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void Timer_Init(void); |
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#define TRUE 1 |
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#define FALSE 0 |
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typedef unsigned char uint8_t; |
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//////////////////////////////////////////////////////////////////
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///////////////// Driver Buffer Definitions //////////////////////
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//////////////////////////////////////////////////////////////////
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// 1,2,4,8,16,32,64,128 or 256 bytes are allowed buffer sizes
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#define TWI_RX_BUFFER_SIZE (16) |
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#define TWI_RX_BUFFER_MASK ( TWI_RX_BUFFER_SIZE - 1 ) |
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#if ( TWI_RX_BUFFER_SIZE & TWI_RX_BUFFER_MASK )
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#error TWI RX buffer size is not a power of 2 |
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#endif
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// 1,2,4,8,16,32,64,128 or 256 bytes are allowed buffer sizes
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#define TWI_TX_BUFFER_SIZE (16) |
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#define TWI_TX_BUFFER_MASK ( TWI_TX_BUFFER_SIZE - 1 ) |
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#if ( TWI_TX_BUFFER_SIZE & TWI_TX_BUFFER_MASK )
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#error TWI TX buffer size is not a power of 2 |
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#endif
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#define USI_SLAVE_CHECK_ADDRESS (0x00) |
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#define USI_SLAVE_SEND_DATA (0x01) |
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#define USI_SLAVE_REQUEST_REPLY_FROM_SEND_DATA (0x02) |
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#define USI_SLAVE_CHECK_REPLY_FROM_SEND_DATA (0x03) |
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#define USI_SLAVE_REQUEST_DATA (0x04) |
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#define USI_SLAVE_GET_DATA_AND_SEND_ACK (0x05) |
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#define DDR_USI DDRB
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#define PORT_USI PORTB
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#define PIN_USI PINB
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#define PORT_USI_SDA PORTB0
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#define PORT_USI_SCL PORTB2
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#define PIN_USI_SDA PINB0
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#define PIN_USI_SCL PINB2
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#define USI_START_COND_INT USISIF
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#define USI_START_VECTOR USI_START_vect
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#define USI_OVERFLOW_VECTOR USI_OVF_vect
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//! Functions implemented as macros
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#define SET_USI_TO_SEND_ACK() \
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{ \ |
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USIDR = 0; /* Prepare ACK */ \ |
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DDR_USI |= (1<<PORT_USI_SDA); /* Set SDA as output */ \ |
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USISR = (0<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)| /* Clear all flags, except Start Cond */ \ |
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(0x0E<<USICNT0); /* set USI counter to shift 1 bit. */ \ |
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} |
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#define SET_USI_TO_READ_ACK() \
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{ \ |
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DDR_USI &= ~(1<<PORT_USI_SDA); /* Set SDA as intput */ \ |
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USIDR = 0; /* Prepare ACK */ \ |
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USISR = (0<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)| /* Clear all flags, except Start Cond */ \ |
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(0x0E<<USICNT0); /* set USI counter to shift 1 bit. */ \ |
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} |
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#define SET_USI_TO_TWI_START_CONDITION_MODE() \
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{ \ |
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USICR = (1<<USISIE)|(0<<USIOIE)| /* Enable Start Condition Interrupt. Disable Overflow Interrupt.*/ \ |
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(1<<USIWM1)|(0<<USIWM0)| /* Set USI in Two-wire mode. No USI Counter overflow hold. */ \ |
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(1<<USICS1)|(0<<USICS0)|(0<<USICLK)| /* Shift Register Clock Source = External, positive edge */ \ |
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(0<<USITC); \
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USISR = (0<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)| /* Clear all flags, except Start Cond */ \ |
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(0x0<<USICNT0); \
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} |
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#define SET_USI_TO_SEND_DATA() \
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{ \ |
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DDR_USI |= (1<<PORT_USI_SDA); /* Set SDA as output */ \ |
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USISR = (0<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)| /* Clear all flags, except Start Cond */ \ |
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(0x0<<USICNT0); /* set USI to shift out 8 bits */ \ |
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} |
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#define SET_USI_TO_READ_DATA() \
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{ \ |
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DDR_USI &= ~(1<<PORT_USI_SDA); /* Set SDA as input */ \ |
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USISR = (0<<USI_START_COND_INT)|(1<<USIOIF)|(1<<USIPF)|(1<<USIDC)| /* Clear all flags, except Start Cond */ \ |
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(0x0<<USICNT0); /* set USI to shift out 8 bits */ \ |
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} |