Revision 277
more cleanup
| analog.c | ||
|---|---|---|
| 57 | 57 |
**/ |
| 58 | 58 |
void analog_init(void) |
| 59 | 59 |
{
|
| 60 |
// ADC Status Register A
|
|
| 61 |
// Bit 7 - ADEN is set (enables analog)
|
|
| 62 |
// Bit 6 - Start conversion bit is set (must be done once for free-running mode)
|
|
| 63 |
// Bit 5 - Enable Auto Trigger (for free running mode)
|
|
| 64 |
// Bit 4 - ADC interrupt flag, 0
|
|
| 65 |
// Bit 3 - Enable ADC Interrupt (required to run free-running mode)
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|
| 66 |
// Bits 2-0 - Set to create a clock divisor of 128, to make ADC clock = 8,000,000/128
|
|
| 67 |
ADCSRA |= 0xEF;
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|
| 60 |
// ADC Status Register A
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|
| 61 |
// Bit 7 - ADEN is set (enables analog)
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|
| 62 |
// Bit 6 - Start conversion bit is set (must be done once for free-running mode)
|
|
| 63 |
// Bit 5 - Enable Auto Trigger (for free running mode)
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|
| 64 |
// Bit 4 - ADC interrupt flag, 0
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|
| 65 |
// Bit 3 - Enable ADC Interrupt (required to run free-running mode)
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|
| 66 |
// Bits 2-0 - Set to create a clock divisor of 128, to make ADC clock = 8,000,000/128
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|
| 67 |
ADCSRA |= 0xEF;
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|
| 68 | 68 |
|
| 69 |
// ADC Status Register B
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|
| 70 |
// Bit 7, 5-3 - Must be cleared
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|
| 71 |
// Bit 2:0 - Set mode, currently cleared for free running operation
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| 72 |
// Bit 6 - Analog comparator mode - cleared
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|
| 73 |
// ADCSRB = 0x00;
|
|
| 69 |
// ADC Status Register B
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|
| 70 |
// Bit 7, 5-3 - Must be cleared
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|
| 71 |
// Bit 2:0 - Set mode, currently cleared for free running operation
|
|
| 72 |
// Bit 6 - Analog comparator mode - cleared
|
|
| 73 |
// ADCSRB = 0x00;
|
|
| 74 | 74 |
|
| 75 |
// ADMUX register
|
|
| 76 |
// Bit 7,6 - Set voltage reference to AVcc (0b01)
|
|
| 77 |
// Bit 5 - Set ADLAR bit for left adjust to do simple 8-bit reads
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|
| 78 |
// Bit 4 - X
|
|
| 79 |
// Bit 3:0 - Sets the current channel, set to ADC7 (the external mux)
|
|
| 80 |
ADMUX = 0x67;
|
|
| 75 |
// ADMUX register
|
|
| 76 |
// Bit 7,6 - Set voltage reference to AVcc (0b01)
|
|
| 77 |
// Bit 5 - Set ADLAR bit for left adjust to do simple 8-bit reads
|
|
| 78 |
// Bit 4 - X
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|
| 79 |
// Bit 3:0 - Sets the current channel, set to ADC7 (the external mux)
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|
| 80 |
ADMUX = 0x67;
|
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| 81 | 81 |
|
| 82 |
// Set external mux lines to outputs
|
|
| 83 |
DDRG |= 0x1C;
|
|
| 84 |
set_adc_mux(0x07);
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|
| 82 |
// Set external mux lines to outputs
|
|
| 83 |
DDRG |= 0x1C;
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|
| 84 |
set_adc_mux(0x07);
|
|
| 85 | 85 |
} |
| 86 | 86 |
|
| 87 | 87 |
|
| ... | ... | |
| 98 | 98 |
**/ |
| 99 | 99 |
unsigned int analog8(int which) |
| 100 | 100 |
{
|
| 101 |
if(which < EXT_MUX) |
|
| 102 |
ADMUX = 0x60 + which; |
|
| 103 |
else if(which == EXT_MUX) |
|
| 104 |
return 0; |
|
| 105 |
else |
|
| 106 |
{
|
|
| 107 |
ADMUX = 0x60 + EXT_MUX; |
|
| 108 |
set_adc_mux(which - 8); |
|
| 109 |
_delay_ms(1); |
|
| 110 |
} |
|
| 101 |
if(which < EXT_MUX) {
|
|
| 102 |
ADMUX = 0x60 + which; |
|
| 103 |
} else if(which == EXT_MUX) {
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| 104 |
return 0; |
|
| 105 |
} else {
|
|
| 106 |
ADMUX = 0x60 + EXT_MUX; |
|
| 107 |
set_adc_mux(which - 8); |
|
| 108 |
_delay_ms(1); |
|
| 109 |
} |
|
| 111 | 110 |
|
| 112 |
_delay_ms(1); // need at least 130 us between conversions
|
|
| 113 |
return ADCH;
|
|
| 111 |
_delay_ms(1); // need at least 130 us between conversions
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|
| 112 |
return ADCH;
|
|
| 114 | 113 |
} |
| 115 | 114 |
|
| 116 | 115 |
/** |
| ... | ... | |
| 126 | 125 |
**/ |
| 127 | 126 |
unsigned int analog10(int which) |
| 128 | 127 |
{
|
| 129 |
unsigned int adc_h = 0;
|
|
| 130 |
unsigned int adc_l = 0;
|
|
| 128 |
unsigned int adc_h = 0;
|
|
| 129 |
unsigned int adc_l = 0;
|
|
| 131 | 130 |
|
| 132 |
if(which < EXT_MUX) |
|
| 133 |
ADMUX = 0x60 + which; |
|
| 134 |
else if(which == EXT_MUX) |
|
| 135 |
return 0; |
|
| 136 |
else |
|
| 137 |
{
|
|
| 138 |
ADMUX = 0x60 + EXT_MUX; |
|
| 139 |
set_adc_mux(which - 8); |
|
| 140 |
_delay_ms(1); |
|
| 141 |
} |
|
| 131 |
if(which < EXT_MUX) {
|
|
| 132 |
ADMUX = 0x60 + which; |
|
| 133 |
} else if(which == EXT_MUX) {
|
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| 134 |
return 0; |
|
| 135 |
} else {
|
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| 136 |
ADMUX = 0x60 + EXT_MUX; |
|
| 137 |
set_adc_mux(which - 8); |
|
| 138 |
_delay_ms(1); |
|
| 139 |
} |
|
| 142 | 140 |
|
| 143 |
_delay_ms(1);
|
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| 144 |
adc_l = ADCL; /* highest 2 bits of ADCL -> least 2 bits of analog val */
|
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| 145 |
adc_h = ADCH; /* ADCH -> 8 highest bits of analog val */
|
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| 141 |
_delay_ms(1);
|
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| 142 |
adc_l = ADCL; /* highest 2 bits of ADCL -> least 2 bits of analog val */
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| 143 |
adc_h = ADCH; /* ADCH -> 8 highest bits of analog val */
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| 146 | 144 |
|
| 147 |
return (adc_h << 2) | (adc_l >> 6);
|
|
| 145 |
return (adc_h << 2) | (adc_l >> 6);
|
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| 148 | 146 |
} |
| 149 | 147 |
|
| 150 | 148 |
/** |
| ... | ... | |
| 159 | 157 |
**/ |
| 160 | 158 |
int wheel(void) |
| 161 | 159 |
{
|
| 162 |
return analog8(WHEEL_PORT);
|
|
| 160 |
return analog8(WHEEL_PORT);
|
|
| 163 | 161 |
} |
| 164 | 162 |
|
| 165 | 163 |
/**@}**/ //end defgroup |
| 166 | 164 |
|
| 167 | 165 |
SIGNAL (SIG_ADC) |
| 168 | 166 |
{
|
| 169 |
// This is just here to catch ADC interrupts because ADC is free running.
|
|
| 170 |
// No code needs to be in here.
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|
| 167 |
// This is just here to catch ADC interrupts because ADC is free running.
|
|
| 168 |
// No code needs to be in here.
|
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| 171 | 169 |
} |
| 172 | 170 |
|
| 173 | 171 |
void set_adc_mux(int which) |
| ... | ... | |
| 180 | 178 |
// mask so only proper bits are possible. |
| 181 | 179 |
PORTG = (PORTG & 0xE3) | ((which & 0x03) << 3) | (which & 0x04); |
| 182 | 180 |
} |
| 183 |
|
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Also available in: Unified diff