Revision 264
First attempt at the frequency hack
NOT TESTED ON THE BOARD!
| branches/autonomous_recharging/code/projects/autonomous_recharging/archs/ConstantCharging.c | ||
|---|---|---|
| 271 | 271 |
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| 272 | 272 |
TCCR1A = (_BV(COM1B1)|_BV(PWM1B)|_BV(COM1A1)|_BV(PWM1A)); //clear timer 1 on compare, set at 0x00. Fast PWM mode |
| 273 | 273 |
TCCR1B |= _BV(CS12)|_BV(CS10); //leave timer on and set compare to 0 to make output off |
| 274 |
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| 275 |
//hack stuff so it will run in continuous mode |
|
| 276 |
TIMSK |= _BV(TOIE1); //enable overflow interrupt for timer 1 |
|
| 277 |
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| 274 | 278 |
OCR1B = 0; |
| 275 | 279 |
OCR1A = 0; |
| 276 | 280 |
|
| ... | ... | |
| 436 | 440 |
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| 437 | 441 |
/* Trickle Charge */ |
| 438 | 442 |
if(status==1) |
| 439 |
OCR1B = 50;
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|
| 443 |
OCR1B = 200;
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|
| 440 | 444 |
} |
| 441 | 445 |
/* NO CONTACT */ |
| 442 | 446 |
else |
| ... | ... | |
| 704 | 708 |
} |
| 705 | 709 |
} |
| 706 | 710 |
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| 711 |
ISR(TIMER1_OVF_vect) |
|
| 712 |
{
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| 713 |
delay_ms(1); //wait a clock cycle so we know the ouput gets set (which happens at timer = 0) |
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| 714 |
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| 715 |
TCNT1 = 156; // start out at 156. Now OCR1B - 156 = duty cycle |
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| 716 |
} |
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| 717 |
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| 707 | 718 |
ISR(PCINT_vect){;} //so the interrupt doesnt go to the reset vector
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