Colony

/*

 * SPI MODULE

 *

 * ...work in progress

 */

/*

PINS: 

SS = PB0

SCK = PB1

MOSI = PB2

MISO = PB3

*/

/* Controls clock freq. see Table 72 */

#define DOUBLE_SCK 1

#define SPR0_BIT 1

#define LSB 1

#define MSB 0

RING_BUFFER_NEW(spi_buffer, 64, char, spi_send_buff, spi_rec_buff);

char spi_status;

int

spi_init() 

{

	RING_BUFFER_CLEAR(spi_send_buff);

	RING_BUFFER_CLEAR(spi_rec_buff);

	/* Set MOSI and SCK as output -- also SS for now...*/

	DDR_SPI = (1<<PB2)|(1<<PB1)|(1<<PB0);

	SPCR = (1<<SPIE)|(1<<SPE)|(LSB<<DORD)|(1<<MSTR)|

		   (SPR1_BIT<<SPR1)|(SPR0_BIT<<SPR0);

	SPSR = (1<<SPIF)|(DOUBLE_SCK<<SPI2X); 

}

void 

spi_send(char *data, size_t bytes)

{

	if(bytes == 0) return -1; /* ...needed?*/

	cli();

	for(i = 1; i < bytes; i++) {

		if(RING_BUFFER_FULL(spi_send_buff)) {

			sei();

			return -1;

    }

    RING_BUFFER_ADD(spi_send_buff, data[i]);

  }

  sei();

  spi_status |= SPI_SENDING;

  SPDR = *data;

}

char

spi_receive(void)

{

	spi_status = SENDING;

	return SPDR;

}

ISR(SIG_SPI) {

	char c;

	switch(spi_status){

		case SENDING:

			if(!RING_BUFFER_EMPTY(spi_send_buff)) {

				RING_BUFFER_REMOVE(spi_send_buff, c);

				SPDR = c;

			} else {

				/* notify of sent? */

				spi_status = VOID;

			}

			break;

		case RECEIVING:

			spi_send_func(SPDR);

			break;

}