Revision 1144
Fixed Makefile docs
Fixed documentation
lights.c | ||
---|---|---|
45 | 45 |
Rewritten from scratch. Fixes code duplication, long ISRs, bugs, unnecessary synchronized code, memory waste |
46 | 46 |
*/ |
47 | 47 |
|
48 |
/** |
|
49 |
* Quick start: call orb_init_pwm or orb_init_binary, depending on which mode you want to use. Call orb*set or |
|
50 |
* orb*set_color to set the orbs. |
|
51 |
* |
|
52 |
* The orbs have two modes of operation: PWM mode and binary mode. In PWM mode, a pwm signal is generated by a hardware |
|
53 |
* timer and the orbs can be set to a value of 0 through 255. In binary mode, the orbs can only be turned on or off and |
|
54 |
* a value of 0 means "off" and any other value means "on". The mode can be chosen on initialization and can be changed |
|
55 |
* at runtime using the orb_set_mode function. |
|
56 |
* |
|
57 |
* Operation (PWM mode): On timer overflow, all LEDs with a value>0 are turned on and the output compare value for the |
|
58 |
* first LED is loaded. On compare match, the corresponding LED is turned off and the next output compare value is |
|
59 |
* loaded. All masks are precomputed and sorted by time when setting the values. |
|
60 |
* |
|
61 |
* The data structure (pwm_t) containing the PWM times and masks is triple buffered. This is because the buffer the ISR |
|
62 |
* is reading from may only be modified on timer overflow before the next PWM sequence is started, because otherwise the |
|
63 |
* next OCR value might be sed to a value smaller than the current timer value, resulting in the remaining channels not |
|
64 |
* being turned off in that PWM period (flash to on). When using two buffers, the page flip can only occur on a timer |
|
65 |
* overflow for the same reason. So after writing a buffer and marking it for page flip, neither of the buffers could be |
|
66 |
* modified because the front buffer is read by the ISR and the back buffer could be switched at any time. So the |
|
67 |
* calling thread would have to be delayed by up to one full PWM period (8ms in the current implementation, but |
|
68 |
* 20ms-50ms would be a reasonable value to expect here). To avoid this, triple buffering is used. |
|
69 |
* |
|
70 |
* The code for applying the orbs is fairly optimized. See the apply_orbs function for some time measurements and |
|
71 |
* further nodes. |
|
72 |
* |
|
73 |
* The PWM frequency is 120Hz (8ms period time). The next lower frequency (determined by the prescaler) is 30 Hz which |
|
74 |
* is too slow (orbs flicker). |
|
75 |
* |
|
76 |
* The orbs code is thread safe, which means that the functions may be called from another interrupt handler. If there |
|
77 |
* are multiple concurrent calls to the orb*set* functions, one of them is ignored and the orbs are never left in an |
|
78 |
* inconsistent state. For example, if the orbs are set to green by the main thread and to red by an interrupt handler, |
|
79 |
* the resulting color will be either red or green, but never yellow. |
|
80 |
* Thread safety is achieved by grabbing a lock at the beginning of all functions that modify the orb code and releasing |
|
81 |
* the lock at the end. If the lock is already taken, the function just returns doing nothing. |
|
82 |
* |
|
83 |
* Some performance measurements: |
|
84 |
* - Time for setting new orb values (PWM mode): 35us-72us (depending on the degree to which the array is |
|
85 |
* already in the correct order) |
|
86 |
* - Time for setting new orb values (binary mode): 5.5us |
|
87 |
* |
|
88 |
* - Interrupt time (PWM mode only): 8us (overflow) |
|
89 |
* 10us (output compare) |
|
90 |
* 6us (last output compare) |
|
91 |
* 30us (output compare, all value equal) |
|
92 |
* |
|
93 |
* - Maximum total interrupt time per period: 64us |
|
94 |
* - Maximum CPU usage for interrupts (PWM mode only): <0.8% |
|
95 |
* |
|
96 |
* - Maximum contiguous synchronized block: 30us (output compare interrupt, all values equal) |
|
97 |
* |
|
98 |
* There are some potential optimizations left. See the source code for more information. |
|
99 |
* |
|
100 |
* A note on robustness: if the output compare interrupt is disabled for too long, either due to a long ISR or a long |
|
101 |
* synchronized code block, the orbs will flicker to brighter values for being turned off too late. With software PWM, |
|
102 |
* there's nothing at all to be done about that. The problem can be alleviated by using a lower PWM frequency, but then |
|
103 |
* the orbs will start flickering all the time due to the low update frequency. |
|
104 |
* Some measurements: with 100us synchronized blocks, the flickering is accepptably low. Longer synchronized blocks |
|
105 |
* mean more flickering. At 1ms synchronized blocks, the flickering is quite bad, especially for low orb values. Note |
|
106 |
* that orb value 0 never flickers at all because the corresponding channels are not turned on at all. |
|
107 |
* Test code (not the _delay_us restrictions!) |
|
108 |
* orb_set (1,1,1); while (1) { SYNC { for (uint8_t m=0; m<10; ++m) { _delay_us(10); } } } |
|
109 |
**/ |
|
110 | 48 |
|
111 |
/* |
|
112 | 49 |
|
113 |
All different: |
|
114 |
|
|
115 |
Overflow: 8us |
|
116 |
|
|
117 |
OC: 5*10+1*6 |
|
118 |
|
|
119 |
All same: |
|
120 |
OC: 30us |
|
121 |
|
|
122 |
*/ |
|
123 |
|
|
124 | 50 |
/* |
125 | 51 |
* Test cases: |
126 | 52 |
* - The following code has to work without flickering: |
Also available in: Unified diff