root / prex-0.9.0 / bsp / drv / dev / input / i8042.h @ 03e9c04a
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/*
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* Copyright (c) 2005, Kohsuke Ohtani
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _KMC_H
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#define _KMC_H
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/*
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* i8042 Keyboard Mouse Controller definition
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*/
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/* I/O ports */
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#define KMC_DATA 0x60 |
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#define KMC_PORTB 0x61 |
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#define KMC_CMD 0x64 |
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#define KMC_STS 0x64 |
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/* Status */
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#define STS_PERR 0x80 /* Parity error */ |
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#define STS_TMO 0x40 /* Timeout */ |
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#define STS_AUXOBF 0x20 /* Mouse OBF */ |
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#define STS_INH 0x10 /* 0: inhibit 1: no-inhibit */ |
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#define STS_SYS 0x04 /* 0: power up 1:Init comp */ |
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#define STS_IBF 0x02 /* Input (to kbd) buffer full */ |
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#define STS_OBF 0x01 /* Output (from kbd) buffer full */ |
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/* Command */
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#define CMD_READ_CMD 0x20 |
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#define CMD_WRITE_CMD 0x60 |
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#define CMD_AUX_DIS 0xa7 |
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#define CMD_AUX_EN 0xa8 |
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#define CMD_KBD_DIS 0xad |
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#define CMD_KBD_EN 0xae |
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#define CMD_READ_OPORT 0xd0 |
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#define CMD_WRITE_OPORT 0xd1 |
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#define CMD_WRITE_AUX 0xd4 |
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/* Auxillary device command */
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#define AUX_ENABLE 0xf4 |
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#define AUX_DISABLE 0xf5 |
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#define AUX_RESET 0xff |
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/*
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* wait_obf: Wait output buffer full
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* wait_obe: Wait input buffer empty
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* wait_ibf: Wait input buffer full
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* wait_ibe: Wait input buffer empty
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*/
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#define kmc_wait_obf() while ((bus_read_8(KMC_STS) & STS_OBF) == 0) |
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#define kmc_wait_obe() while (bus_read_8(KMC_STS) & STS_OBF) |
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#define kmc_wait_ibf() while ((bus_read_8(KMC_STS) & STS_IBF) == 0) |
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#define kmc_wait_ibe() while (bus_read_8(KMC_STS) & STS_IBF) |
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#endif /* !_KMC_H */ |