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/*-
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 * Copyright (c) 2008, Kohsuke Ohtani
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * 1. Redistributions of source code must retain the above copyright
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 *    notice, this list of conditions and the following disclaimer.
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 * 2. Redistributions in binary form must reproduce the above copyright
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 *    notice, this list of conditions and the following disclaimer in the
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 *    documentation and/or other materials provided with the distribution.
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 * 3. Neither the name of the author nor the names of any co-contributors
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 *    may be used to endorse or promote products derived from this software
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 *    without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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 * SUCH DAMAGE.
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 */
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/*
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 * head.S - generic header code for ARM platforms.
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 */
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#include <conf/config.h>
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#include <machine/memory.h>
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#include <machine/syspage.h>
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#define ENTRY(x) .global x; .align; x##:
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	.section ".text","ax"
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	.code 32
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/*
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 * Loader entry point
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 */
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ENTRY(boot_entry)
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	b	start_vector
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	.align
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	.code 32
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stack_end:	.word	(BOOTSTKTOP - KERNBASE)
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start_vector:
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	mov	r0, #0xd3		/* Enter SVC mode, Disable IRQ,FIQ */
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	msr	cpsr_c, r0
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	ldr	sp, stack_end
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	adr	r0, thumb_mode + 1
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	bx	r0
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	.code 16
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thumb_mode:
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	ldr	r0, =main
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	bx	r0			/* Change to ARM mode */
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	.section .tail,"ax"
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dummy:
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	.byte	0xff
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.end