root / prex-0.9.0 / bsp / hal / x86 / include / context.h @ 03e9c04a
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1 | 03e9c04a | Brad Neuman | /*-
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2 | * Copyright (c) 2005-2008, Kohsuke Ohtani
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | * 1. Redistributions of source code must retain the above copyright
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9 | * notice, this list of conditions and the following disclaimer.
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10 | * 2. Redistributions in binary form must reproduce the above copyright
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11 | * notice, this list of conditions and the following disclaimer in the
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12 | * documentation and/or other materials provided with the distribution.
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13 | * 3. Neither the name of the author nor the names of any co-contributors
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14 | * may be used to endorse or promote products derived from this software
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15 | * without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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27 | * SUCH DAMAGE.
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28 | */
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29 | |||
30 | #ifndef _X86_CONTEXT_H
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31 | #define _X86_CONTEXT_H
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32 | |||
33 | #include <sys/types.h> |
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34 | |||
35 | /*
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36 | * Common register frame for trap/interrupt.
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37 | * These cpu state are saved into top of the kernel stack in
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38 | * trap/interrupt entries. Since the arguments of system calls are
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39 | * passed via registers, the system call library is completely
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40 | * dependent on this register format.
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41 | *
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42 | * The value of ss & esp are not valid for kernel mode trap
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43 | * because these are set only when privilege level is changed.
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44 | */
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45 | struct cpu_regs {
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46 | uint32_t ebx; /* +0 (00) --- s/w trap frame --- */
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47 | uint32_t ecx; /* +4 (04) */
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48 | uint32_t edx; /* +8 (08) */
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49 | uint32_t esi; /* +12 (0C) */
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50 | uint32_t eax; /* +16 (10) */
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51 | uint32_t edi; /* +20 (14) */
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52 | uint32_t ebp; /* +24 (18) */
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53 | uint32_t ds; /* +28 (1C) */
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54 | uint32_t es; /* +32 (20) */
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55 | uint32_t trap_no; /* +36 (24) --- h/w trap frame --- */
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56 | uint32_t err_code; /* +40 (28) */
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57 | uint32_t eip; /* +44 (2C) */
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58 | uint32_t cs; /* +48 (30) */
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59 | uint32_t eflags; /* +52 (34) */
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60 | uint32_t esp; /* +56 (38) */
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61 | uint32_t ss; /* +60 (3C) */
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62 | }; |
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63 | |||
64 | /*
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65 | * Kernel mode context for context switching.
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66 | */
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67 | struct kern_regs {
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68 | uint32_t eip; /* +0 (00) */
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69 | uint32_t ebx; /* +4 (04) */
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70 | uint32_t edi; /* +8 (08) */
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71 | uint32_t esi; /* +12 (0C) */
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72 | uint32_t ebp; /* +16 (10) */
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73 | uint32_t esp; /* +20 (14) */
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74 | }; |
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75 | |||
76 | /*
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77 | * FPU register for fsave/frstor
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78 | */
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79 | struct fpu_regs {
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80 | uint32_t ctrl_word; |
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81 | uint32_t stat_word; |
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82 | uint32_t tag_word; |
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83 | uint32_t ip_offset; |
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84 | uint32_t cs_sel; |
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85 | uint32_t op_offset; |
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86 | uint32_t op_sel; |
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87 | uint32_t st[20];
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88 | }; |
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89 | |||
90 | /*
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91 | * Processor context
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92 | */
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93 | struct context {
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94 | struct kern_regs kregs; /* kernel mode registers */ |
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95 | struct cpu_regs *uregs; /* user mode registers */ |
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96 | struct cpu_regs *saved_regs; /* saved user mode registers */ |
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97 | #ifdef CONFIG_FPU
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98 | struct fpu_regs *fregs; /* co-processor registers */ |
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99 | #endif
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100 | uint32_t esp0; /* top of kernel stack */
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101 | }; |
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102 | |||
103 | typedef struct context *context_t; /* context id */ |
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104 | |||
105 | #endif /* !_X86_CONTEXT_H */ |