root / prex-0.9.0 / bsp / hal / ppc / include / cpu.h @ 03e9c04a
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1 | 03e9c04a | Brad Neuman | /*-
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2 | * Copyright (c) 2009, Kohsuke Ohtani
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | * 1. Redistributions of source code must retain the above copyright
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9 | * notice, this list of conditions and the following disclaimer.
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10 | * 2. Redistributions in binary form must reproduce the above copyright
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11 | * notice, this list of conditions and the following disclaimer in the
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12 | * documentation and/or other materials provided with the distribution.
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13 | * 3. Neither the name of the author nor the names of any co-contributors
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14 | * may be used to endorse or promote products derived from this software
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15 | * without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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27 | * SUCH DAMAGE.
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28 | */
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29 | |||
30 | #ifndef _PPC_CPU_H
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31 | #define _PPC_CPU_H
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32 | |||
33 | #include <sys/cdefs.h> |
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34 | |||
35 | #define STKFRAME_LEN 8 /* length for stack frame */ |
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36 | |||
37 | /*
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38 | * Flags in MSR
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39 | */
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40 | #define MSR_LE 0x00000001 /* little-endian mode enable */ |
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41 | #define MSR_RI 0x00000002 /* recoverable exception */ |
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42 | #define MSR_DR 0x00000010 /* data address translation */ |
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43 | #define MSR_IR 0x00000020 /* instruction address translation */ |
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44 | #define MSR_IP 0x00000040 /* exception prefix */ |
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45 | #define MSR_FE1 0x00000100 /* floating-point exception mode 1 */ |
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46 | #define MSR_BE 0x00000200 /* branch trace enable */ |
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47 | #define MSR_SE 0x00000400 /* single-step trace enable */ |
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48 | #define MSR_FE0 0x00000800 /* floating-point exception mode 0 */ |
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49 | #define MSR_ME 0x00001000 /* machine check enable */ |
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50 | #define MSR_FP 0x00002000 /* floating-point available */ |
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51 | #define MSR_PR 0x00004000 /* privilege level (1:USR) */ |
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52 | #define MSR_EE 0x00008000 /* external interrupt enable */ |
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53 | #define MSR_ILE 0x00010000 /* exception little-endian mode (1:LE) */ |
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54 | #define MSR_POW 0x00040000 /* power management enable */ |
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55 | |||
56 | |||
57 | /* default msr for starting user program */
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58 | #if 0
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59 | #ifdef CONFIG_MMU
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60 | #define MSR_DFLT (uint32_t)(MSR_EE | MSR_PR | MSR_ME | MSR_IR | MSR_DR)
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61 | #else
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62 | #define MSR_DFLT (uint32_t)(MSR_EE | MSR_PR | MSR_ME)
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63 | #endif
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64 | #endif
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65 | #define MSR_DFLT (uint32_t)(MSR_EE | MSR_PR)
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66 | |||
67 | /*
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68 | * Special Purpose Register declarations.
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69 | */
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70 | #define SPR_XER 1 /* fixed point exception register */ |
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71 | #define SPR_LR 8 /* link register */ |
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72 | #define SPR_CTR 9 /* count register */ |
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73 | #define SPR_DSISR 18 /* DSI exception register */ |
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74 | #define SPR_DAR 19 /* data access register */ |
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75 | #define SPR_DEC 22 /* decrementer register */ |
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76 | #define SPR_SRR0 26 /* save/restore register 0 */ |
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77 | #define SPR_SRR1 27 /* save/restore register 1 */ |
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78 | #define SPR_SPRG0 272 /* SPR general 0 */ |
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79 | #define SPR_SPRG1 273 /* SPR general 1 */ |
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80 | #define SPR_SPRG2 274 /* SPR general 2 */ |
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81 | #define SPR_SPRG3 275 /* SPR general 3 */ |
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82 | #define SPR_PVR 287 /* processor version register */ |
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83 | |||
84 | |||
85 | #ifndef __ASSEMBLY__
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86 | |||
87 | __BEGIN_DECLS |
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88 | void outb(int, u_char); |
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89 | u_char inb(int);
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90 | __END_DECLS |
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91 | |||
92 | #endif /* !__ASSEMBLY__ */ |
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93 | #endif /* !_PPC_CPU_H */ |