root / prex-0.9.0 / bsp / boot / arm / arch / head.S @ 03e9c04a
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1 | 03e9c04a | Brad Neuman | /*- |
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2 | * Copyright (c) 2008, Kohsuke Ohtani |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * 1. Redistributions of source code must retain the above copyright |
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9 | * notice, this list of conditions and the following disclaimer. |
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10 | * 2. Redistributions in binary form must reproduce the above copyright |
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11 | * notice, this list of conditions and the following disclaimer in the |
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12 | * documentation and/or other materials provided with the distribution. |
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13 | * 3. Neither the name of the author nor the names of any co-contributors |
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14 | * may be used to endorse or promote products derived from this software |
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15 | * without specific prior written permission. |
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16 | * |
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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27 | * SUCH DAMAGE. |
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28 | */ |
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29 | |||
30 | /* |
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31 | * head.S - generic header code for ARM platforms. |
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32 | */ |
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33 | |||
34 | #include <conf/config.h> |
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35 | #include <machine/memory.h> |
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36 | #include <machine/syspage.h> |
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37 | |||
38 | #define ENTRY(x) .global x; .align; x##: |
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39 | |||
40 | .section ".text","ax" |
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41 | .code 32 |
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42 | /* |
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43 | * Loader entry point |
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44 | */ |
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45 | ENTRY(boot_entry) |
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46 | b start_vector |
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47 | |||
48 | .align |
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49 | .code 32 |
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50 | stack_end: .word (BOOTSTKTOP - KERNBASE) |
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51 | |||
52 | start_vector: |
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53 | mov r0, #0xd3 /* Enter SVC mode, Disable IRQ,FIQ */ |
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54 | msr cpsr_c, r0 |
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55 | ldr sp, stack_end |
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56 | |||
57 | adr r0, thumb_mode + 1 |
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58 | bx r0 |
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59 | .code 16 |
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60 | thumb_mode: |
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61 | |||
62 | ldr r0, =main |
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63 | bx r0 /* Change to ARM mode */ |
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64 | |||
65 | .section .tail,"ax" |
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66 | dummy: |
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67 | .byte 0xff |
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68 | |||
69 | .end |