Statistics
| Branch: | Revision:

scoutos / prex-0.9.0 / bsp / hal / ppc / include / cpu.h @ 03e9c04a

History | View | Annotate | Download (3.58 KB)

1
/*-
2
 * Copyright (c) 2009, Kohsuke Ohtani
3
 * All rights reserved.
4
 *
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
7
 * are met:
8
 * 1. Redistributions of source code must retain the above copyright
9
 *    notice, this list of conditions and the following disclaimer.
10
 * 2. Redistributions in binary form must reproduce the above copyright
11
 *    notice, this list of conditions and the following disclaimer in the
12
 *    documentation and/or other materials provided with the distribution.
13
 * 3. Neither the name of the author nor the names of any co-contributors
14
 *    may be used to endorse or promote products derived from this software
15
 *    without specific prior written permission.
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27
 * SUCH DAMAGE.
28
 */
29

    
30
#ifndef _PPC_CPU_H
31
#define _PPC_CPU_H
32

    
33
#include <sys/cdefs.h>
34

    
35
#define STKFRAME_LEN        8                /* length for stack frame */
36

    
37
/*
38
 * Flags in MSR
39
 */
40
#define        MSR_LE                0x00000001        /* little-endian mode enable */
41
#define        MSR_RI                0x00000002        /* recoverable exception */
42
#define        MSR_DR                0x00000010        /* data address translation */
43
#define        MSR_IR                0x00000020        /* instruction address translation */
44
#define        MSR_IP                0x00000040        /* exception prefix */
45
#define        MSR_FE1                0x00000100        /* floating-point exception mode 1 */
46
#define        MSR_BE                0x00000200        /* branch trace enable */
47
#define        MSR_SE                0x00000400        /* single-step trace enable */
48
#define        MSR_FE0                0x00000800        /* floating-point exception mode 0 */
49
#define        MSR_ME                0x00001000        /* machine check enable */
50
#define        MSR_FP                0x00002000        /* floating-point available */
51
#define        MSR_PR                0x00004000        /* privilege level (1:USR) */
52
#define        MSR_EE                0x00008000        /* external interrupt enable */
53
#define        MSR_ILE                0x00010000        /* exception little-endian mode (1:LE) */
54
#define        MSR_POW                0x00040000        /* power management enable */
55

    
56

    
57
/* default msr for starting user program */
58
#if 0
59
#ifdef CONFIG_MMU
60
#define MSR_DFLT        (uint32_t)(MSR_EE | MSR_PR | MSR_ME | MSR_IR | MSR_DR)
61
#else
62
#define MSR_DFLT        (uint32_t)(MSR_EE | MSR_PR | MSR_ME)
63
#endif
64
#endif
65
#define MSR_DFLT        (uint32_t)(MSR_EE | MSR_PR)
66

    
67
/*
68
 * Special Purpose Register declarations.
69
 */
70
#define        SPR_XER                          1        /* fixed point exception register */
71
#define        SPR_LR                          8        /* link register */
72
#define        SPR_CTR                          9        /* count register */
73
#define        SPR_DSISR                 18        /* DSI exception register */
74
#define        SPR_DAR                         19        /* data access register */
75
#define        SPR_DEC                         22        /* decrementer register */
76
#define        SPR_SRR0                 26        /* save/restore register 0 */
77
#define        SPR_SRR1                 27        /* save/restore register 1 */
78
#define        SPR_SPRG0                272        /* SPR general 0 */
79
#define        SPR_SPRG1                273        /* SPR general 1 */
80
#define        SPR_SPRG2                274        /* SPR general 2 */
81
#define        SPR_SPRG3                275        /* SPR general 3 */
82
#define        SPR_PVR                        287        /* processor version register */
83

    
84

    
85
#ifndef __ASSEMBLY__
86

    
87
__BEGIN_DECLS
88
void         outb(int, u_char);
89
u_char         inb(int);
90
__END_DECLS
91

    
92
#endif /* !__ASSEMBLY__ */
93
#endif /* !_PPC_CPU_H */