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scoutos / prex-0.9.0 / bsp / hal / arm / gba / clock.c @ 03e9c04a

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/*-
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 * Copyright (c) 2005-2007, Kohsuke Ohtani
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * 1. Redistributions of source code must retain the above copyright
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 *    notice, this list of conditions and the following disclaimer.
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 * 2. Redistributions in binary form must reproduce the above copyright
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 *    notice, this list of conditions and the following disclaimer in the
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 *    documentation and/or other materials provided with the distribution.
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 * 3. Neither the name of the author nor the names of any co-contributors
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 *    may be used to endorse or promote products derived from this software
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 *    without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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 * SUCH DAMAGE.
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 */
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/*
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 * clock.c - clock driver
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 */
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#include <sys/ipl.h>
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#include <kernel.h>
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#include <timer.h>
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#include <irq.h>
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#include <cpufunc.h>
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/* Interrupt vector for timer (TMR0 of GBA) */
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#define CLOCK_IRQ        3
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/* The clock rate per second ... 2^24 */
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#define CLOCK_RATE        16777216L
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/* The initial counter value */
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#define TIMER_COUNT        (0xffff - (CLOCK_RATE / 64 / HZ))
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/* GBA timer registers */
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#define TMR0_COUNT        (*(volatile uint16_t *)0x4000100)
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#define TMR0_CTRL        (*(volatile uint16_t *)0x4000102)
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/* Timer frequency */
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#define TMR_1_CLOCK        0x0000
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#define TMR_64_CLOCK        0x0001
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#define TMR_256_CLOCK        0x0002
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#define TMR_1024_CLOCK        0x0003
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/* Cascade switch */
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#define TMR_CASCADE        0x0004
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/* Interrupt for overflow */
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#define        TMR_IRQEN        0x0040
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/* Timer switch */
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#define TMR_EN                0x0080
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/*
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 * Clock interrupt service routine.
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 * No H/W reprogram is required.
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 */
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static int
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clock_isr(void *arg)
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{
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        splhigh();
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        timer_handler();
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        spl0();
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        return INT_DONE;
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}
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/*
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 * Initialize clock H/W chip.
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 * Setup clock tick rate and install clock ISR.
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 */
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void
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clock_init(void)
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{
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        irq_t clock_irq;
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        /* Setup counter value */
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        TMR0_COUNT = TIMER_COUNT;
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        TMR0_CTRL = (uint16_t)(TMR_IRQEN | TMR_64_CLOCK);
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        /* Install ISR */
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        clock_irq = irq_attach(CLOCK_IRQ, IPL_CLOCK, 0, &clock_isr,
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                               IST_NONE, NULL);
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        /* Enable timer */
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        TMR0_CTRL |= TMR_EN;
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}