scoutos / prex-0.9.0 / bsp / boot / x86 / pc / debug.c @ 03e9c04a
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/*-
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* Copyright (c) 2005-2009, Kohsuke Ohtani
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h> |
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#include <boot.h> |
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extern void outb(int, u_char); |
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extern u_char inb(int); |
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#define SCREEN_80x25 1 |
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/* #define SCREEN_80x50 1 */
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#define COM_BASE CONFIG_NS16550_BASE
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/* Register offsets */
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#define COM_RBR (COM_BASE + 0x00) /* receive buffer register */ |
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#define COM_THR (COM_BASE + 0x00) /* transmit holding register */ |
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#define COM_IER (COM_BASE + 0x01) /* interrupt enable register */ |
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#define COM_FCR (COM_BASE + 0x02) /* FIFO control register */ |
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#define COM_IIR (COM_BASE + 0x02) /* interrupt identification register */ |
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#define COM_LCR (COM_BASE + 0x03) /* line control register */ |
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#define COM_MCR (COM_BASE + 0x04) /* modem control register */ |
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#define COM_LSR (COM_BASE + 0x05) /* line status register */ |
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#define COM_MSR (COM_BASE + 0x06) /* modem status register */ |
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#define COM_DLL (COM_BASE + 0x00) /* divisor latch LSB (LCR[7] = 1) */ |
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#define COM_DLM (COM_BASE + 0x01) /* divisor latch MSB (LCR[7] = 1) */ |
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/*
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* Print one chracter
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*/
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void
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debug_putc(int c)
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{ |
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#if defined(DEBUG) && defined(CONFIG_DIAG_SERIAL)
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/*
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* output to serial port.
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*/
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while (!(inb(COM_LSR) & 0x20)) |
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; |
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outb(COM_THR, c); |
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#endif
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#if defined(DEBUG) && defined(CONFIG_DIAG_BOCHS)
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/*
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* output to bochs emulater console.
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*/
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if (inb(0xe9) == 0xe9) |
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outb(0xe9, (u_char)c);
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#endif
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} |
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/*
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* Initialize debug port.
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*/
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void
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debug_init(void)
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{ |
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#if defined(DEBUG) && defined(CONFIG_DIAG_SERIAL)
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/*
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* Initialize serial port.
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*/
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if (inb(COM_LSR) == 0xff) |
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return; /* Serial port is disabled */ |
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outb(COM_IER, 0x00); /* Disable interrupt */ |
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outb(COM_LCR, 0x80); /* Access baud rate */ |
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outb(COM_DLL, 0x01); /* 115200 baud */ |
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outb(COM_DLM, 0x00);
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outb(COM_LCR, 0x03); /* N, 8, 1 */ |
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outb(COM_MCR, 0x03); /* Ready */ |
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outb(COM_FCR, 0x00); /* Disable FIFO */ |
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inb(COM_RBR); |
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inb(COM_RBR); |
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#endif
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} |