scoutos / prex-0.9.0 / bsp / boot / arm / integrator / debug.c @ 03e9c04a
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1 | 03e9c04a | Brad Neuman | /*-
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2 | * Copyright (c) 2008-2009, Kohsuke Ohtani
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | * 1. Redistributions of source code must retain the above copyright
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9 | * notice, this list of conditions and the following disclaimer.
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10 | * 2. Redistributions in binary form must reproduce the above copyright
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11 | * notice, this list of conditions and the following disclaimer in the
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12 | * documentation and/or other materials provided with the distribution.
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13 | * 3. Neither the name of the author nor the names of any co-contributors
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14 | * may be used to endorse or promote products derived from this software
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15 | * without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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27 | * SUCH DAMAGE.
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28 | */
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29 | |||
30 | #include <sys/param.h> |
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31 | #include <boot.h> |
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32 | |||
33 | #define UART_BASE 0x16000000 |
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34 | #define UART_CLK 14745600 |
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35 | #define BAUD_RATE 115200 |
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36 | |||
37 | /* UART Registers */
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38 | #define UART_DR (*(volatile uint32_t *)(UART_BASE + 0x00)) |
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39 | #define UART_RSR (*(volatile uint32_t *)(UART_BASE + 0x04)) |
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40 | #define UART_ECR (*(volatile uint32_t *)(UART_BASE + 0x04)) |
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41 | #define UART_FR (*(volatile uint32_t *)(UART_BASE + 0x18)) |
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42 | #define UART_IBRD (*(volatile uint32_t *)(UART_BASE + 0x24)) |
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43 | #define UART_FBRD (*(volatile uint32_t *)(UART_BASE + 0x28)) |
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44 | #define UART_LCRH (*(volatile uint32_t *)(UART_BASE + 0x2c)) |
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45 | #define UART_CR (*(volatile uint32_t *)(UART_BASE + 0x30)) |
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46 | #define UART_IMSC (*(volatile uint32_t *)(UART_BASE + 0x38)) |
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47 | #define UART_MIS (*(volatile uint32_t *)(UART_BASE + 0x40)) |
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48 | #define UART_ICR (*(volatile uint32_t *)(UART_BASE + 0x44)) |
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49 | |||
50 | /* Flag register */
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51 | #define FR_RXFE 0x10 /* Receive FIFO empty */ |
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52 | #define FR_TXFF 0x20 /* Transmit FIFO full */ |
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53 | |||
54 | /* Masked interrupt status register */
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55 | #define MIS_RX 0x10 /* Receive interrupt */ |
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56 | #define MIS_TX 0x20 /* Transmit interrupt */ |
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57 | |||
58 | /* Interrupt clear register */
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59 | #define ICR_RX 0x10 /* Clear receive interrupt */ |
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60 | #define ICR_TX 0x20 /* Clear transmit interrupt */ |
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61 | |||
62 | /* Line control register (High) */
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63 | #define LCRH_WLEN8 0x60 /* 8 bits */ |
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64 | #define LCRH_FEN 0x10 /* Enable FIFO */ |
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65 | |||
66 | /* Control register */
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67 | #define CR_UARTEN 0x0001 /* UART enable */ |
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68 | #define CR_TXE 0x0100 /* Transmit enable */ |
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69 | #define CR_RXE 0x0200 /* Receive enable */ |
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70 | |||
71 | /* Interrupt mask set/clear register */
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72 | #define IMSC_RX 0x10 /* Receive interrupt mask */ |
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73 | #define IMSC_TX 0x20 /* Transmit interrupt mask */ |
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74 | |||
75 | /*
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76 | * Print one chracter
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77 | */
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78 | void
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79 | debug_putc(int c)
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80 | { |
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81 | |||
82 | #if defined(DEBUG) && defined(CONFIG_DIAG_SERIAL)
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83 | while (UART_FR & FR_TXFF)
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84 | ; |
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85 | UART_DR = c; |
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86 | #endif
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87 | } |
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88 | |||
89 | /*
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90 | * Initialize debug port.
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91 | */
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92 | void
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93 | debug_init(void)
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94 | { |
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95 | |||
96 | #if defined(DEBUG) && defined(CONFIG_DIAG_SERIAL)
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97 | unsigned int divider; |
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98 | unsigned int remainder; |
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99 | unsigned int fraction; |
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100 | |||
101 | UART_CR = 0x0; /* Disable everything */ |
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102 | UART_ICR = 0x07ff; /* Clear all interrupt status */ |
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103 | |||
104 | /*
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105 | * Set baud rate:
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106 | * IBRD = UART_CLK / (16 * BAUD_RATE)
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107 | * FBRD = ROUND((64 * MOD(UART_CLK,(16 * BAUD_RATE))) / (16 * BAUD_RATE))
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108 | */
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109 | divider = UART_CLK / (16 * BAUD_RATE);
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110 | remainder = UART_CLK % (16 * BAUD_RATE);
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111 | fraction = (8 * remainder / BAUD_RATE) >> 1; |
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112 | fraction += (8 * remainder / BAUD_RATE) & 1; |
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113 | UART_IBRD = divider; |
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114 | UART_FBRD = fraction; |
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115 | |||
116 | UART_LCRH = (LCRH_WLEN8 | LCRH_FEN); /* N, 8, 1, FIFO enable */
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117 | UART_CR = (CR_RXE | CR_TXE | CR_UARTEN); /* Enable UART */
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118 | #endif
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119 | } |