18743 - Energy Aware Computing

/* I inclued this copyright since we're using Cacti for some stuff */

/*------------------------------------------------------------

 *  Copyright 1994 Digital Equipment Corporation and Steve Wilton

 *                         All Rights Reserved

 *

 * Permission to use, copy, and modify this software and its documentation is

 * hereby granted only under the following terms and conditions.  Both the

 * above copyright notice and this permission notice must appear in all copies

 * of the software, derivative works or modified versions, and any portions

 * thereof, and both notices must appear in supporting documentation.

 *

 * Users of this software agree to the terms and conditions set forth herein,

 * and hereby grant back to Digital a non-exclusive, unrestricted, royalty-

 * free right and license under any changes, enhancements or extensions

 * made to the core functions of the software, including but not limited to

 * those affording compatibility with other hardware or software

 * environments, but excluding applications which incorporate this software.

 * Users further agree to use their best efforts to return to Digital any

 * such changes, enhancements or extensions that they make and inform Digital

 * of noteworthy uses of this software.  Correspondence should be provided

 * to Digital at:

 *

 *                       Director of Licensing

 *                       Western Research Laboratory

 *                       Digital Equipment Corporation

 *                       100 Hamilton Avenue

 *                       Palo Alto, California  94301

 *

 * This software may be distributed (but not offered for sale or transferred

 * for compensation) to third parties, provided such third parties agree to

 * abide by the terms and conditions of this notice.

 *

 * THE SOFTWARE IS PROVIDED "AS IS" AND DIGITAL EQUIPMENT CORP. DISCLAIMS ALL

 * WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES

 * OF MERCHANTABILITY AND FITNESS.   IN NO EVENT SHALL DIGITAL EQUIPMENT

 * CORPORATION BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL

 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR

 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS

 * ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS

 * SOFTWARE.

 *------------------------------------------------------------*/

#include <math.h>

#include "power.h"

#include "machine.h"

#include "cache.h"

#include "sim.h"

#include <assert.h>

//#define SensePowerfactor (Mhz)*(Vdd/2)*(Vdd/2)

//#define Sense2Powerfactor (Mhz)*(2*.3+.1*Vdd)

//#define Powerfactor (Mhz)*Vdd*Vdd

//#define LowSwingPowerfactor (Mhz)*.2*.2

/* set scale for crossover (vdd->gnd) currents */

double crossover_scaling = 1.2;

/* set non-ideal turnoff percentage */

double turnoff_factor = 0.1;

#define MSCALE (LSCALE * .624 / .2250)

/*----------------------------------------------------------------------*/

/* static power model results */

power_result_type power;

int pow2(int x) {

  return((int)pow(2.0,(double)x));

}

double logfour(x)

     double x;

{

  if (x<=0) fprintf(stderr,"%e\n",x);

  return( (double) (log(x)/log(4.0)) );

}

/* safer pop count to validate the fast algorithm */

int pop_count_slow(bquad_t bits)

{

  int count = 0; 

  bquad_t tmpbits = bits; 

  while (tmpbits) { 

    if (tmpbits & 1) ++count; 

    tmpbits >>= 1; 

  } 

  return count; 

}

/* fast pop count */

int pop_count(bquad_t bits)

{

#define T unsigned long long

#define ONES ((T)(-1)) 

#define TWO(k) ((T)1 << (k)) 

#define CYCL(k) (ONES/(1 + (TWO(TWO(k))))) 

#define BSUM(x,k) ((x)+=(x) >> TWO(k), (x) &= CYCL(k)) 

  bquad_t x = bits; 

  x = (x & CYCL(0)) + ((x>>TWO(0)) & CYCL(0)); 

  x = (x & CYCL(1)) + ((x>>TWO(1)) & CYCL(1)); 

  BSUM(x,2); 

  BSUM(x,3); 

  BSUM(x,4); 

  BSUM(x,5); 

  return x; 

}

int opcode_length = 8;

int inst_length = 32;

extern int ruu_decode_width;

extern int ruu_issue_width;

extern int ruu_commit_width;

extern int RUU_size;

extern int LSQ_size;

extern int data_width;

extern int res_ialu;

extern int res_fpalu;

extern int res_memport;

int nvreg_width;

int npreg_width;

extern int bimod_config[];

extern struct cache_t *cache_dl1;

extern struct cache_t *cache_il1;

extern struct cache_t *cache_dl2;

extern struct cache_t *dtlb;

extern struct cache_t *itlb;

/* 2-level predictor config (<l1size> <l2size> <hist_size> <xor>) */

extern int twolev_config[];

/* combining predictor config (<meta_table_size> */

extern int comb_config[];

/* return address stack (RAS) size */

extern int ras_size;

/* BTB predictor config (<num_sets> <associativity>) */

extern int btb_config[];

double global_clockcap;

static double rename_power=0;

static double bpred_power=0;

static double window_power=0;

static double lsq_power=0;

static double regfile_power=0;

static double icache_power=0;

static double dcache_power=0;

static double dcache2_power=0;

static double alu_power=0;

static double falu_power=0;

static double resultbus_power=0;

static double clock_power=0;

static double rename_power_cc1=0;

static double bpred_power_cc1=0;

static double window_power_cc1=0;

static double lsq_power_cc1=0;

static double regfile_power_cc1=0;

static double icache_power_cc1=0;

static double dcache_power_cc1=0;

static double dcache2_power_cc1=0;

static double alu_power_cc1=0;

static double resultbus_power_cc1=0;

static double clock_power_cc1=0;

static double rename_power_cc2=0;

static double bpred_power_cc2=0;

static double window_power_cc2=0;

static double lsq_power_cc2=0;

static double regfile_power_cc2=0;

static double icache_power_cc2=0;

static double dcache_power_cc2=0;

static double dcache2_power_cc2=0;

static double alu_power_cc2=0;

static double resultbus_power_cc2=0;

static double clock_power_cc2=0;

static double rename_power_cc3=0;

static double bpred_power_cc3=0;

static double window_power_cc3=0;

static double lsq_power_cc3=0;

static double regfile_power_cc3=0;

static double icache_power_cc3=0;

static double dcache_power_cc3=0;

static double dcache2_power_cc3=0;

static double alu_power_cc3=0;

static double resultbus_power_cc3=0;

static double clock_power_cc3=0;

static double total_cycle_power;

static double total_cycle_power_cc1;

static double total_cycle_power_cc2;

static double total_cycle_power_cc3;

static double total_parasitic_cc1 = 0.0;

static double total_parasitic_cc2 = 0.0;

static double total_parasitic_cc3 = 0.0;

#define PARASITIC_OHM 0.002

static double max_amp = 0.00;

static double min_amp = 1000.00;

static double offchip_ploss[] = {0.5, 0.5, // 1 amp

                                 0.5, 0.5, // 2 amp

                                 0.5, 0.5, // 3 amp

                                 0.6, 0.7, // 4

                                 0.8, 0.9, // 5

                                 1.0, 1.1, // 6

                                 1.2, 1.3, // 7

                                 1.5, 1.6, // 8

                                 1.8, 2.0, // 9

                                 2.2, 2.4, // 10

                                 2.6, 2.8, // 11

                                 3.0, 3.3, // 12

                                 3.6, 3.9, 4.0}; // 13

static double last_single_total_cycle_power_cc1 = 0.0;

static double last_single_total_cycle_power_cc2 = 0.0;

static double last_single_total_cycle_power_cc3 = 0.0;

static double current_total_cycle_power_cc1;

static double current_total_cycle_power_cc2;

static double current_total_cycle_power_cc3;

static double last_sim_num_insn = 0;

static double last_sim_total_insn = 0;

static double diff_dispatch = 0;

static double diff_commit = 0;

static int speed_grade = 1;

static int last_speed_grade = 1;

static double diff_dispatch_sum = 0;

static double diff_commit_sum = 0;

static int init_count = 0;

//#define DVFS_FIX

#define SUM_OVER 50000 // longer time = more power consumed

static double hist_dispatch[SUM_OVER];

static double hist_commit[SUM_OVER];

static int hist_idx = 0;

static double slow_cycles = 0;

static double fast_cycles = 0;

static double last_switch_time = 0;

static double cycle_count = 0;

#define SWITCH_CYCLES 30

static int speed_delay[SWITCH_CYCLES];

#define ONCHIP_VREG_LOSS_LOW 0.220

#define ONCHIP_VREG_LOSS_HIGH 0.120

static double max_cycle_power_cc1 = 0.0;

static double max_cycle_power_cc2 = 0.0;

static double max_cycle_power_cc3 = 0.0;

extern counter_t rename_access;

extern counter_t bpred_access;

extern counter_t window_access;

extern counter_t lsq_access;

extern counter_t regfile_access;

extern counter_t icache_access;

extern counter_t dcache_access;

extern counter_t dcache2_access;

extern counter_t alu_access;

extern counter_t ialu_access;

extern counter_t falu_access;

extern counter_t resultbus_access;

extern counter_t window_selection_access;

extern counter_t window_wakeup_access;

extern counter_t window_preg_access;

extern counter_t lsq_preg_access;

extern counter_t lsq_wakeup_access;

extern counter_t lsq_store_data_access;

extern counter_t lsq_load_data_access;

extern counter_t window_total_pop_count_cycle;

extern counter_t window_num_pop_count_cycle;

extern counter_t lsq_total_pop_count_cycle;

extern counter_t lsq_num_pop_count_cycle;

extern counter_t regfile_total_pop_count_cycle;

extern counter_t regfile_num_pop_count_cycle;

extern counter_t resultbus_total_pop_count_cycle;

extern counter_t resultbus_num_pop_count_cycle;

static counter_t total_rename_access=0;

static counter_t total_bpred_access=0;

static counter_t total_window_access=0;

static counter_t total_lsq_access=0;

static counter_t total_regfile_access=0;

static counter_t total_icache_access=0;

static counter_t total_dcache_access=0;

static counter_t total_dcache2_access=0;

static counter_t total_alu_access=0;

static counter_t total_resultbus_access=0;

static counter_t max_rename_access;

static counter_t max_bpred_access;

static counter_t max_window_access;

static counter_t max_lsq_access;

static counter_t max_regfile_access;

static counter_t max_icache_access;

static counter_t max_dcache_access;

static counter_t max_dcache2_access;

static counter_t max_alu_access;

static counter_t max_resultbus_access;

void clear_access_stats()

{

  rename_access=0;

  bpred_access=0;

  window_access=0;

  lsq_access=0;

  regfile_access=0;

  icache_access=0;

  dcache_access=0;

  dcache2_access=0;

  alu_access=0;

  ialu_access=0;

  falu_access=0;

  resultbus_access=0;

  window_preg_access=0;

  window_selection_access=0;

  window_wakeup_access=0;

  lsq_store_data_access=0;

  lsq_load_data_access=0;

  lsq_wakeup_access=0;

  lsq_preg_access=0;

  window_total_pop_count_cycle=0;

  window_num_pop_count_cycle=0;

  lsq_total_pop_count_cycle=0;

  lsq_num_pop_count_cycle=0;

  regfile_total_pop_count_cycle=0;

  regfile_num_pop_count_cycle=0;

  resultbus_total_pop_count_cycle=0;

  resultbus_num_pop_count_cycle=0;

}

/* compute bitline activity factors which we use to scale bitline power 

   Here it is very important whether we assume 0's or 1's are

   responsible for dissipating power in pre-charged stuctures. (since

   most of the bits are 0's, we assume the design is power-efficient

   enough to allow 0's to _not_ discharge 

*/

double compute_af(counter_t num_pop_count_cycle,counter_t total_pop_count_cycle,int pop_width) {

  double avg_pop_count;

  double af,af_b;

  if(num_pop_count_cycle)

    avg_pop_count = (double)total_pop_count_cycle / (double)num_pop_count_cycle;

  else

    avg_pop_count = 0;

  af = avg_pop_count / (double)pop_width;

  af_b = 1.0 - af;

  /*  printf("af == %f%%, af_b == %f%%, total_pop == %d, num_pop == %d\n",100*af,100*af_b,total_pop_count_cycle,num_pop_count_cycle); */

  return(af_b);

}

/* compute power statistics on each cycle, for each conditional clocking style.  Obviously

most of the speed penalty comes here, so if you don't want per-cycle power estimates

you could post-process 

See README.wattch for details on the various clock gating styles.

*/

void update_power_stats()

{

  double window_af_b, lsq_af_b, regfile_af_b, resultbus_af_b;

  double current;

  int speed_idx;

#ifdef DYNAMIC_AF

  window_af_b = compute_af(window_num_pop_count_cycle,window_total_pop_count_cycle,data_width);

  lsq_af_b = compute_af(lsq_num_pop_count_cycle,lsq_total_pop_count_cycle,data_width);

  regfile_af_b = compute_af(regfile_num_pop_count_cycle,regfile_total_pop_count_cycle,data_width);

  resultbus_af_b = compute_af(resultbus_num_pop_count_cycle,resultbus_total_pop_count_cycle,data_width);

#endif

  rename_power+=power.rename_power;

  bpred_power+=power.bpred_power;

  window_power+=power.window_power;

  lsq_power+=power.lsq_power;

  regfile_power+=power.regfile_power;

  icache_power+=power.icache_power+power.itlb;

  dcache_power+=power.dcache_power+power.dtlb;

  dcache2_power+=power.dcache2_power;

  alu_power+=power.ialu_power + power.falu_power;

  falu_power+=power.falu_power;

  resultbus_power+=power.resultbus;

  clock_power+=power.clock_power;

  total_rename_access+=rename_access;

  total_bpred_access+=bpred_access;

  total_window_access+=window_access;

  total_lsq_access+=lsq_access;

  total_regfile_access+=regfile_access;

  total_icache_access+=icache_access;

  total_dcache_access+=dcache_access;

  total_dcache2_access+=dcache2_access;

  total_alu_access+=alu_access;

  total_resultbus_access+=resultbus_access;

  max_rename_access=MAX(rename_access,max_rename_access);

  max_bpred_access=MAX(bpred_access,max_bpred_access);

  max_window_access=MAX(window_access,max_window_access);

  max_lsq_access=MAX(lsq_access,max_lsq_access);

  max_regfile_access=MAX(regfile_access,max_regfile_access);

  max_icache_access=MAX(icache_access,max_icache_access);

  max_dcache_access=MAX(dcache_access,max_dcache_access);

  max_dcache2_access=MAX(dcache2_access,max_dcache2_access);

  max_alu_access=MAX(alu_access,max_alu_access);

  max_resultbus_access=MAX(resultbus_access,max_resultbus_access);

  if(rename_access) {

    rename_power_cc1+=power.rename_power;

    rename_power_cc2+=((double)rename_access/(double)ruu_decode_width)*power.rename_power;

    rename_power_cc3+=((double)rename_access/(double)ruu_decode_width)*power.rename_power;

  }

  else 

    rename_power_cc3+=turnoff_factor*power.rename_power;

  if(bpred_access) {

    if(bpred_access <= 2)

      bpred_power_cc1+=power.bpred_power;

    else

      bpred_power_cc1+=((double)bpred_access/2.0) * power.bpred_power;

    bpred_power_cc2+=((double)bpred_access/2.0) * power.bpred_power;

    bpred_power_cc3+=((double)bpred_access/2.0) * power.bpred_power;

  }

  else

    bpred_power_cc3+=turnoff_factor*power.bpred_power;

#ifdef STATIC_AF

  if(window_preg_access) {

    if(window_preg_access <= 3*ruu_issue_width)

      window_power_cc1+=power.rs_power;

    else

      window_power_cc1+=((double)window_preg_access/(3.0*(double)ruu_issue_width))*power.rs_power;

    window_power_cc2+=((double)window_preg_access/(3.0*(double)ruu_issue_width))*power.rs_power;

    window_power_cc3+=((double)window_preg_access/(3.0*(double)ruu_issue_width))*power.rs_power;

  }

  else

    window_power_cc3+=turnoff_factor*power.rs_power;

#elif defined(DYNAMIC_AF)

  if(window_preg_access) {

    if(window_preg_access <= 3*ruu_issue_width)

      window_power_cc1+=power.rs_power_nobit + window_af_b*power.rs_bitline;

    else

      window_power_cc1+=((double)window_preg_access/(3.0*(double)ruu_issue_width))*(power.rs_power_nobit + window_af_b*power.rs_bitline);

    window_power_cc2+=((double)window_preg_access/(3.0*(double)ruu_issue_width))*(power.rs_power_nobit + window_af_b*power.rs_bitline);

    window_power_cc3+=((double)window_preg_access/(3.0*(double)ruu_issue_width))*(power.rs_power_nobit + window_af_b*power.rs_bitline);

  }

  else

    window_power_cc3+=turnoff_factor*power.rs_power;

#else

  panic("no AF-style defined\n");

#endif

  if(window_selection_access) {

    if(window_selection_access <= ruu_issue_width)

      window_power_cc1+=power.selection;

    else

      window_power_cc1+=((double)window_selection_access/((double)ruu_issue_width))*power.selection;

    window_power_cc2+=((double)window_selection_access/((double)ruu_issue_width))*power.selection;

    window_power_cc3+=((double)window_selection_access/((double)ruu_issue_width))*power.selection;

  }

  else

    window_power_cc3+=turnoff_factor*power.selection;

  if(window_wakeup_access) {

    if(window_wakeup_access <= ruu_issue_width)

      window_power_cc1+=power.wakeup_power;

    else

      window_power_cc1+=((double)window_wakeup_access/((double)ruu_issue_width))*power.wakeup_power;

    window_power_cc2+=((double)window_wakeup_access/((double)ruu_issue_width))*power.wakeup_power;

    window_power_cc3+=((double)window_wakeup_access/((double)ruu_issue_width))*power.wakeup_power;

  }

  else

    window_power_cc3+=turnoff_factor*power.wakeup_power;

  if(lsq_wakeup_access) {

    if(lsq_wakeup_access <= res_memport)

      lsq_power_cc1+=power.lsq_wakeup_power;

    else

      lsq_power_cc1+=((double)lsq_wakeup_access/((double)res_memport))*power.lsq_wakeup_power;

    lsq_power_cc2+=((double)lsq_wakeup_access/((double)res_memport))*power.lsq_wakeup_power;

    lsq_power_cc3+=((double)lsq_wakeup_access/((double)res_memport))*power.lsq_wakeup_power;

  }

  else

    lsq_power_cc3+=turnoff_factor*power.lsq_wakeup_power;

#ifdef STATIC_AF

  if(lsq_preg_access) {

    if(lsq_preg_access <= res_memport)

      lsq_power_cc1+=power.lsq_rs_power;

    else

      lsq_power_cc1+=((double)lsq_preg_access/((double)res_memport))*power.lsq_rs_power;

    lsq_power_cc2+=((double)lsq_preg_access/((double)res_memport))*power.lsq_rs_power;

    lsq_power_cc3+=((double)lsq_preg_access/((double)res_memport))*power.lsq_rs_power;

  }

  else

    lsq_power_cc3+=turnoff_factor*power.lsq_rs_power;

#else

  if(lsq_preg_access) {

    if(lsq_preg_access <= res_memport)

      lsq_power_cc1+=power.lsq_rs_power_nobit + lsq_af_b*power.lsq_rs_bitline;

    else

      lsq_power_cc1+=((double)lsq_preg_access/((double)res_memport))*(power.lsq_rs_power_nobit + lsq_af_b*power.lsq_rs_bitline);

    lsq_power_cc2+=((double)lsq_preg_access/((double)res_memport))*(power.lsq_rs_power_nobit + lsq_af_b*power.lsq_rs_bitline);

    lsq_power_cc3+=((double)lsq_preg_access/((double)res_memport))*(power.lsq_rs_power_nobit + lsq_af_b*power.lsq_rs_bitline);

  }

  else

    lsq_power_cc3+=turnoff_factor*power.lsq_rs_power;

#endif

#ifdef STATIC_AF

  if(regfile_access) {

    if(regfile_access <= (3.0*ruu_commit_width))

      regfile_power_cc1+=power.regfile_power;

    else

      regfile_power_cc1+=((double)regfile_access/(3.0*(double)ruu_commit_width))*power.regfile_power;

    regfile_power_cc2+=((double)regfile_access/(3.0*(double)ruu_commit_width))*power.regfile_power;

    regfile_power_cc3+=((double)regfile_access/(3.0*(double)ruu_commit_width))*power.regfile_power;

  }

  else

    regfile_power_cc3+=turnoff_factor*power.regfile_power;

#else

  if(regfile_access) {

    if(regfile_access <= (3.0*ruu_commit_width))

      regfile_power_cc1+=power.regfile_power_nobit + regfile_af_b*power.regfile_bitline;

    else

      regfile_power_cc1+=((double)regfile_access/(3.0*(double)ruu_commit_width))*(power.regfile_power_nobit + regfile_af_b*power.regfile_bitline);

    regfile_power_cc2+=((double)regfile_access/(3.0*(double)ruu_commit_width))*(power.regfile_power_nobit + regfile_af_b*power.regfile_bitline);

    regfile_power_cc3+=((double)regfile_access/(3.0*(double)ruu_commit_width))*(power.regfile_power_nobit + regfile_af_b*power.regfile_bitline);

  }

  else

    regfile_power_cc3+=turnoff_factor*power.regfile_power;

#endif

  if(icache_access) {

    /* don't scale icache because we assume 1 line is fetched, unless fetch stalls */

    icache_power_cc1+=power.icache_power+power.itlb;

    icache_power_cc2+=power.icache_power+power.itlb;

    icache_power_cc3+=power.icache_power+power.itlb;

  }

  else

    icache_power_cc3+=turnoff_factor*(power.icache_power+power.itlb);

  if(dcache_access) {

    if(dcache_access <= res_memport)

      dcache_power_cc1+=power.dcache_power+power.dtlb;

    else

      dcache_power_cc1+=((double)dcache_access/(double)res_memport)*(power.dcache_power +

                                                     power.dtlb);

    dcache_power_cc2+=((double)dcache_access/(double)res_memport)*(power.dcache_power +

                                                   power.dtlb);

    dcache_power_cc3+=((double)dcache_access/(double)res_memport)*(power.dcache_power +

                                                   power.dtlb);

  }

  else

    dcache_power_cc3+=turnoff_factor*(power.dcache_power+power.dtlb);

  if(dcache2_access) {

    if(dcache2_access <= res_memport)

      dcache2_power_cc1+=power.dcache2_power;

    else

      dcache2_power_cc1+=((double)dcache2_access/(double)res_memport)*power.dcache2_power;

    dcache2_power_cc2+=((double)dcache2_access/(double)res_memport)*power.dcache2_power;

    dcache2_power_cc3+=((double)dcache2_access/(double)res_memport)*power.dcache2_power;

  }

  else

    dcache2_power_cc3+=turnoff_factor*power.dcache2_power;

  if(alu_access) {

    if(ialu_access)

      alu_power_cc1+=power.ialu_power;

    else

      alu_power_cc3+=turnoff_factor*power.ialu_power;

    if(falu_access)

      alu_power_cc1+=power.falu_power;

    else

      alu_power_cc3+=turnoff_factor*power.falu_power;

    alu_power_cc2+=((double)ialu_access/(double)res_ialu)*power.ialu_power +

      ((double)falu_access/(double)res_fpalu)*power.falu_power;

    alu_power_cc3+=((double)ialu_access/(double)res_ialu)*power.ialu_power +

      ((double)falu_access/(double)res_fpalu)*power.falu_power;

  }

  else

    alu_power_cc3+=turnoff_factor*(power.ialu_power + power.falu_power);

#ifdef STATIC_AF

  if(resultbus_access) {

    assert(ruu_issue_width != 0);

    if(resultbus_access <= ruu_issue_width) {

      resultbus_power_cc1+=power.resultbus;

    }

    else {

      resultbus_power_cc1+=((double)resultbus_access/(double)ruu_issue_width)*power.resultbus;

    }

    resultbus_power_cc2+=((double)resultbus_access/(double)ruu_issue_width)*power.resultbus;

    resultbus_power_cc3+=((double)resultbus_access/(double)ruu_issue_width)*power.resultbus;

  }

  else

    resultbus_power_cc3+=turnoff_factor*power.resultbus;

#else

  if(resultbus_access) {

    assert(ruu_issue_width != 0);

    if(resultbus_access <= ruu_issue_width) {

      resultbus_power_cc1+=resultbus_af_b*power.resultbus;

    }

    else {

      resultbus_power_cc1+=((double)resultbus_access/(double)ruu_issue_width)*resultbus_af_b*power.resultbus;

    }

    resultbus_power_cc2+=((double)resultbus_access/(double)ruu_issue_width)*resultbus_af_b*power.resultbus;

    resultbus_power_cc3+=((double)resultbus_access/(double)ruu_issue_width)*resultbus_af_b*power.resultbus;

  }

  else

    resultbus_power_cc3+=turnoff_factor*power.resultbus;

#endif

  total_cycle_power = rename_power + bpred_power + window_power + 

    lsq_power + regfile_power + icache_power + dcache_power +

    alu_power + resultbus_power;

  total_cycle_power_cc1 = rename_power_cc1 + bpred_power_cc1 + 

    window_power_cc1 + lsq_power_cc1 + regfile_power_cc1 + 

    icache_power_cc1 + dcache_power_cc1 + alu_power_cc1 + 

    resultbus_power_cc1;

  total_cycle_power_cc2 = rename_power_cc2 + bpred_power_cc2 + 

    window_power_cc2 + lsq_power_cc2 + regfile_power_cc2 + 

    icache_power_cc2 + dcache_power_cc2 + alu_power_cc2 + 

    resultbus_power_cc2;

  total_cycle_power_cc3 = rename_power_cc3 + bpred_power_cc3 + 

    window_power_cc3 + lsq_power_cc3 + regfile_power_cc3 + 

    icache_power_cc3 + dcache_power_cc3 + alu_power_cc3 + 

    resultbus_power_cc3;

  clock_power_cc1+=power.clock_power*(total_cycle_power_cc1/total_cycle_power);

  clock_power_cc2+=power.clock_power*(total_cycle_power_cc2/total_cycle_power);

  clock_power_cc3+=power.clock_power*(total_cycle_power_cc3/total_cycle_power);

  total_cycle_power_cc1 += clock_power_cc1;

  total_cycle_power_cc2 += clock_power_cc2;

  total_cycle_power_cc3 += clock_power_cc3;

  current_total_cycle_power_cc1 = total_cycle_power_cc1

    -last_single_total_cycle_power_cc1;

  current_total_cycle_power_cc2 = total_cycle_power_cc2

    -last_single_total_cycle_power_cc2;

  current_total_cycle_power_cc3 = total_cycle_power_cc3

    -last_single_total_cycle_power_cc3;

   current = current_total_cycle_power_cc3 / Vdd;

  if (max_amp < current ) {

      max_amp = current ;

  }

  if (min_amp > current) {

      min_amp = current;

  }

  if (current < 0.5) {

      total_parasitic_cc1 += offchip_ploss[0];

      total_parasitic_cc2 += offchip_ploss[0];

      total_parasitic_cc3 += offchip_ploss[0];

  } else if (current < 1) {

      total_parasitic_cc1 += offchip_ploss[1];

      total_parasitic_cc2 += offchip_ploss[1];

      total_parasitic_cc3 += offchip_ploss[1];

  } else if (current < 1.5) {

      total_parasitic_cc1 += offchip_ploss[2];

      total_parasitic_cc2 += offchip_ploss[2];

      total_parasitic_cc3 += offchip_ploss[2];

  } else if (current < 2) {

      total_parasitic_cc1 += offchip_ploss[3];

      total_parasitic_cc2 += offchip_ploss[3];

      total_parasitic_cc3 += offchip_ploss[3];

  } else if (current < 2.5) {

      total_parasitic_cc1 += offchip_ploss[4];

      total_parasitic_cc2 += offchip_ploss[4];

      total_parasitic_cc3 += offchip_ploss[4];

  } else if (current < 3) {

      total_parasitic_cc1 += offchip_ploss[5];

      total_parasitic_cc2 += offchip_ploss[5];

      total_parasitic_cc3 += offchip_ploss[5];

  } else if (current < 3.5) {

      total_parasitic_cc1 += offchip_ploss[6];

      total_parasitic_cc2 += offchip_ploss[6];

      total_parasitic_cc3 += offchip_ploss[6];

  } else if (current < 4) {

      total_parasitic_cc1 += offchip_ploss[7];

      total_parasitic_cc2 += offchip_ploss[7];

      total_parasitic_cc3 += offchip_ploss[7];

  } else if (current < 4.5) {

      total_parasitic_cc1 += offchip_ploss[8];

      total_parasitic_cc2 += offchip_ploss[8];

      total_parasitic_cc3 += offchip_ploss[8];

  } else if (current < 5) {

      total_parasitic_cc1 += offchip_ploss[9];

      total_parasitic_cc2 += offchip_ploss[9];

      total_parasitic_cc3 += offchip_ploss[9];

  } else if (current < 5.5) {

      total_parasitic_cc1 += offchip_ploss[10];

      total_parasitic_cc2 += offchip_ploss[10];

      total_parasitic_cc3 += offchip_ploss[10];

  } else if (current < 6) {

      total_parasitic_cc1 += offchip_ploss[11];

      total_parasitic_cc2 += offchip_ploss[11];

      total_parasitic_cc3 += offchip_ploss[11];

  } else if (current < 6.5) {

      total_parasitic_cc1 += offchip_ploss[12];

      total_parasitic_cc2 += offchip_ploss[12];

      total_parasitic_cc3 += offchip_ploss[12];

  } else if (current < 7) {

      total_parasitic_cc1 += offchip_ploss[13];

      total_parasitic_cc2 += offchip_ploss[13];

      total_parasitic_cc3 += offchip_ploss[13];

  } else if (current < 7.5) {

      total_parasitic_cc1 += offchip_ploss[14];

      total_parasitic_cc2 += offchip_ploss[14];

      total_parasitic_cc3 += offchip_ploss[14];

  } else if (current < 8) {

      total_parasitic_cc1 += offchip_ploss[15];

      total_parasitic_cc2 += offchip_ploss[15];

      total_parasitic_cc3 += offchip_ploss[15];

  } else if (current < 8.5) {

      total_parasitic_cc1 += offchip_ploss[16];

      total_parasitic_cc2 += offchip_ploss[16];

      total_parasitic_cc3 += offchip_ploss[16];

  } else if (current < 9) {

      total_parasitic_cc1 += offchip_ploss[17];

      total_parasitic_cc2 += offchip_ploss[17];

      total_parasitic_cc3 += offchip_ploss[17];

  } else if (current < 9.5) {

      total_parasitic_cc1 += offchip_ploss[18];

      total_parasitic_cc2 += offchip_ploss[18];

      total_parasitic_cc3 += offchip_ploss[18];

  } else if (current < 10) {

      total_parasitic_cc1 += offchip_ploss[19];

      total_parasitic_cc2 += offchip_ploss[19];

      total_parasitic_cc3 += offchip_ploss[19];

  } else if (current < 10.5) {

      total_parasitic_cc1 += offchip_ploss[20];

      total_parasitic_cc2 += offchip_ploss[20];

      total_parasitic_cc3 += offchip_ploss[20];

  } else if (current < 11) {

      total_parasitic_cc1 += offchip_ploss[21];

      total_parasitic_cc2 += offchip_ploss[21];

      total_parasitic_cc3 += offchip_ploss[21];

  } else if (current < 11.5) {

      total_parasitic_cc1 += offchip_ploss[22];

      total_parasitic_cc2 += offchip_ploss[22];

      total_parasitic_cc3 += offchip_ploss[22];

  } else if (current < 12) {

      total_parasitic_cc1 += offchip_ploss[23];

      total_parasitic_cc2 += offchip_ploss[23];

      total_parasitic_cc3 += offchip_ploss[23];

  } else if (current < 12.5) {

      total_parasitic_cc1 += offchip_ploss[24];

      total_parasitic_cc2 += offchip_ploss[24];

      total_parasitic_cc3 += offchip_ploss[24];

  } else if (current < 13) {

      total_parasitic_cc1 += offchip_ploss[25];

      total_parasitic_cc2 += offchip_ploss[25];

      total_parasitic_cc3 += offchip_ploss[25];

  } else {

      total_parasitic_cc1 += offchip_ploss[26];

      total_parasitic_cc2 += offchip_ploss[26];

      total_parasitic_cc3 += offchip_ploss[26];

  }

  total_parasitic_cc1 += pow(current, 2) * PARASITIC_OHM;

  total_parasitic_cc2 += pow(current, 2) * PARASITIC_OHM;

  total_parasitic_cc3 += pow(current, 2) * PARASITIC_OHM;

  // Onchip regulator paraisitc loss

  if (speed_grade == 0) {

      total_parasitic_cc1 += ONCHIP_VREG_LOSS_LOW;

      total_parasitic_cc2 += ONCHIP_VREG_LOSS_LOW;

      total_parasitic_cc3 += ONCHIP_VREG_LOSS_LOW;

  } else {

      total_parasitic_cc1 += ONCHIP_VREG_LOSS_HIGH;

      total_parasitic_cc2 += ONCHIP_VREG_LOSS_HIGH;

      total_parasitic_cc3 += ONCHIP_VREG_LOSS_HIGH;

  }

  max_cycle_power_cc1 = MAX(max_cycle_power_cc1,current_total_cycle_power_cc1);

  max_cycle_power_cc2 = MAX(max_cycle_power_cc2,current_total_cycle_power_cc2);

  max_cycle_power_cc3 = MAX(max_cycle_power_cc3,current_total_cycle_power_cc3);

  last_single_total_cycle_power_cc1 = total_cycle_power_cc1;

  last_single_total_cycle_power_cc2 = total_cycle_power_cc2;

  last_single_total_cycle_power_cc3 = total_cycle_power_cc3;

  cycle_count++;

  // here's where we change VFI levels

  diff_dispatch = sim_total_insn - last_sim_total_insn;

  diff_commit = sim_num_insn - last_sim_num_insn;

  diff_dispatch_sum += diff_dispatch;

  diff_commit_sum += diff_commit;

  hist_dispatch[hist_idx] = diff_dispatch;

  hist_commit[hist_idx] = diff_commit;

  hist_idx++;

  if(hist_idx >= SUM_OVER) {

    hist_idx = 0;

  }

  if(init_count >= SUM_OVER) {

      // Update speed

    speed_grade = speed_delay[SWITCH_CYCLES - 1];

    for (speed_idx = 0; speed_idx < SWITCH_CYCLES-1; speed_idx++) {

        speed_delay[speed_idx+1] = speed_delay[speed_idx];

    }

    diff_dispatch_sum -= hist_dispatch[hist_idx];

    diff_commit_sum -= hist_commit[hist_idx];

    if( diff_commit_sum < diff_dispatch_sum ) {

        speed_delay[0] = 0;

    }

    else if( diff_commit_sum >= diff_dispatch_sum ) {

        speed_delay[0] = 1;

    }

    if(speed_grade == 0) {

        slow_cycles++;

    }

    else {

        fast_cycles++;

    }

  } else {

    init_count++;

    fast_cycles++;

    for (speed_idx = 0; speed_idx < SWITCH_CYCLES; speed_idx++) {

        speed_delay[speed_idx] = 1;

    }

  }

//  if (diff_commit <= diff_dispatch) {

//      speed_grade = 0;

//  } else if (diff_commit > diff_dispatch) {

//      speed_grade = 1;

//  }

  if ((speed_grade == 0) && (last_speed_grade == 1)) {

      Mhz = Mhz / 2;

      Vdd = Vdd / 2;

      printf("Speed down!\n");

      last_switch_time = cycle_count;

  } else if ((speed_grade == 1) && (last_speed_grade == 0)) {

      Mhz = Mhz * 2;

      Vdd = Vdd * 2;

      printf("Speed up!\n");

      last_switch_time = cycle_count;

  }

#ifdef DVFS_FIX

  else if (last_switch_time < cycle_count-(SUM_OVER/3) && speed_grade==0 ) {

      speed_grade = 1;

      Mhz = Mhz * 2;

      Vdd = Vdd * 2;

      init_count = 0;

      last_switch_time = cycle_count;

      hist_idx = 0;

      diff_commit_sum = 0;

      diff_dispatch_sum = 0;

  }

#endif

      //printf("Vdd = %f, MHz = %f\n",Vdd,Mhz);

  if (speed_grade != last_speed_grade) {

    Period = 1/Mhz;

    SensePowerfactor3 = Mhz * Vbitsense * Vbitsense;

    SensePowerfactor2 = Mhz * (Vbitpre - Vbitsense) * (Vbitpre - Vbitsense);

    SensePowerfactor = (Mhz) * (Vdd/2) * (Vdd/2);

    Powerfactor = (Mhz) * (Vdd) * (Vdd);

    Sense2Powerfactor = Mhz * (2 * .3 + .1 * Vdd);

    LowSwingPowerfactor = Mhz * .2 * .2;

      calculate_power(&power);

  }

  last_speed_grade = speed_grade;

  // Update

  last_sim_num_insn  = sim_num_insn;

  last_sim_total_insn = sim_total_insn;

}

void

power_reg_stats(struct stat_sdb_t *sdb)        /* stats database */

{

  stat_reg_double(sdb, "rename_power", "total power usage of rename unit", &rename_power, 0, NULL);

  stat_reg_double(sdb, "bpred_power", "total power usage of bpred unit", &bpred_power, 0, NULL);

  stat_reg_double(sdb, "window_power", "total power usage of instruction window", &window_power, 0, NULL);

  stat_reg_double(sdb, "lsq_power", "total power usage of load/store queue", &lsq_power, 0, NULL);

  stat_reg_double(sdb, "regfile_power", "total power usage of arch. regfile", &regfile_power, 0, NULL);

  stat_reg_double(sdb, "icache_power", "total power usage of icache", &icache_power, 0, NULL);

  stat_reg_double(sdb, "dcache_power", "total power usage of dcache", &dcache_power, 0, NULL);

  stat_reg_double(sdb, "dcache2_power", "total power usage of dcache2", &dcache2_power, 0, NULL);

  stat_reg_double(sdb, "alu_power", "total power usage of alu", &alu_power, 0, NULL);

  stat_reg_double(sdb, "falu_power", "total power usage of falu", &falu_power, 0, NULL);

  stat_reg_double(sdb, "resultbus_power", "total power usage of resultbus", &resultbus_power, 0, NULL);

  stat_reg_double(sdb, "clock_power", "total power usage of clock", &clock_power, 0, NULL);

  stat_reg_formula(sdb, "avg_rename_power", "avg power usage of rename unit", "rename_power/sim_cycle", NULL);

  stat_reg_formula(sdb, "avg_bpred_power", "avg power usage of bpred unit", "bpred_power/sim_cycle", NULL);

  stat_reg_formula(sdb, "avg_window_power", "avg power usage of instruction window", "window_power/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_lsq_power", "avg power usage of lsq", "lsq_power/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_regfile_power", "avg power usage of arch. regfile", "regfile_power/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_icache_power", "avg power usage of icache", "icache_power/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_dcache_power", "avg power usage of dcache", "dcache_power/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_dcache2_power", "avg power usage of dcache2", "dcache2_power/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_alu_power", "avg power usage of alu", "alu_power/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_falu_power", "avg power usage of falu", "falu_power/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_resultbus_power", "avg power usage of resultbus", "resultbus_power/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_clock_power", "avg power usage of clock", "clock_power/sim_cycle",  NULL);

  stat_reg_formula(sdb, "fetch_stage_power", "total power usage of fetch stage", "icache_power + bpred_power", NULL);

  stat_reg_formula(sdb, "dispatch_stage_power", "total power usage of dispatch stage", "rename_power", NULL);

  stat_reg_formula(sdb, "issue_stage_power", "total power usage of issue stage", "resultbus_power + alu_power + dcache_power + dcache2_power + window_power + lsq_power", NULL);

  stat_reg_formula(sdb, "avg_fetch_power", "average power of fetch unit per cycle", "(icache_power + bpred_power)/ sim_cycle", /* format */NULL);

  stat_reg_formula(sdb, "avg_dispatch_power", "average power of dispatch unit per cycle", "(rename_power)/ sim_cycle", /* format */NULL);

  stat_reg_formula(sdb, "avg_issue_power", "average power of issue unit per cycle", "(resultbus_power + alu_power + dcache_power + dcache2_power + window_power + lsq_power)/ sim_cycle", /* format */NULL);

  stat_reg_formula(sdb, "total_power", "total power per cycle","(rename_power + bpred_power + window_power + lsq_power + regfile_power + icache_power  + resultbus_power + clock_power + alu_power + dcache_power + dcache2_power)", NULL);

  stat_reg_formula(sdb, "avg_total_power_cycle", "average total power per cycle","(rename_power + bpred_power + window_power + lsq_power + regfile_power + icache_power + resultbus_power + clock_power + alu_power + dcache_power + dcache2_power)/sim_cycle", NULL);

  stat_reg_formula(sdb, "avg_total_power_cycle_nofp_nod2", "average total power per cycle","(rename_power + bpred_power + window_power + lsq_power + regfile_power + icache_power + resultbus_power + clock_power + alu_power + dcache_power - falu_power )/sim_cycle", NULL);

  stat_reg_formula(sdb, "avg_total_power_insn", "average total power per insn","(rename_power + bpred_power + window_power + lsq_power + regfile_power + icache_power + resultbus_power + clock_power + alu_power + dcache_power + dcache2_power)/sim_total_insn", NULL);

  stat_reg_formula(sdb, "avg_total_power_insn_nofp_nod2", "average total power per insn","(rename_power + bpred_power + window_power + lsq_power + regfile_power + icache_power + resultbus_power + clock_power + alu_power + dcache_power - falu_power )/sim_total_insn", NULL);

  stat_reg_double(sdb, "rename_power_cc1", "total power usage of rename unit_cc1", &rename_power_cc1, 0, NULL);

  stat_reg_double(sdb, "bpred_power_cc1", "total power usage of bpred unit_cc1", &bpred_power_cc1, 0, NULL);

  stat_reg_double(sdb, "window_power_cc1", "total power usage of instruction window_cc1", &window_power_cc1, 0, NULL);

  stat_reg_double(sdb, "lsq_power_cc1", "total power usage of lsq_cc1", &lsq_power_cc1, 0, NULL);

  stat_reg_double(sdb, "regfile_power_cc1", "total power usage of arch. regfile_cc1", &regfile_power_cc1, 0, NULL);

  stat_reg_double(sdb, "icache_power_cc1", "total power usage of icache_cc1", &icache_power_cc1, 0, NULL);

  stat_reg_double(sdb, "dcache_power_cc1", "total power usage of dcache_cc1", &dcache_power_cc1, 0, NULL);

  stat_reg_double(sdb, "dcache2_power_cc1", "total power usage of dcache2_cc1", &dcache2_power_cc1, 0, NULL);

  stat_reg_double(sdb, "alu_power_cc1", "total power usage of alu_cc1", &alu_power_cc1, 0, NULL);

  stat_reg_double(sdb, "resultbus_power_cc1", "total power usage of resultbus_cc1", &resultbus_power_cc1, 0, NULL);

  stat_reg_double(sdb, "clock_power_cc1", "total power usage of clock_cc1", &clock_power_cc1, 0, NULL);

  stat_reg_formula(sdb, "avg_rename_power_cc1", "avg power usage of rename unit_cc1", "rename_power_cc1/sim_cycle", NULL);

  stat_reg_formula(sdb, "avg_bpred_power_cc1", "avg power usage of bpred unit_cc1", "bpred_power_cc1/sim_cycle", NULL);

  stat_reg_formula(sdb, "avg_window_power_cc1", "avg power usage of instruction window_cc1", "window_power_cc1/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_lsq_power_cc1", "avg power usage of lsq_cc1", "lsq_power_cc1/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_regfile_power_cc1", "avg power usage of arch. regfile_cc1", "regfile_power_cc1/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_icache_power_cc1", "avg power usage of icache_cc1", "icache_power_cc1/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_dcache_power_cc1", "avg power usage of dcache_cc1", "dcache_power_cc1/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_dcache2_power_cc1", "avg power usage of dcache2_cc1", "dcache2_power_cc1/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_alu_power_cc1", "avg power usage of alu_cc1", "alu_power_cc1/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_resultbus_power_cc1", "avg power usage of resultbus_cc1", "resultbus_power_cc1/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_clock_power_cc1", "avg power usage of clock_cc1", "clock_power_cc1/sim_cycle",  NULL);

  stat_reg_formula(sdb, "fetch_stage_power_cc1", "total power usage of fetch stage_cc1", "icache_power_cc1 + bpred_power_cc1", NULL);

  stat_reg_formula(sdb, "dispatch_stage_power_cc1", "total power usage of dispatch stage_cc1", "rename_power_cc1", NULL);

  stat_reg_formula(sdb, "issue_stage_power_cc1", "total power usage of issue stage_cc1", "resultbus_power_cc1 + alu_power_cc1 + dcache_power_cc1 + dcache2_power_cc1 + lsq_power_cc1 + window_power_cc1", NULL);

  stat_reg_formula(sdb, "avg_fetch_power_cc1", "average power of fetch unit per cycle_cc1", "(icache_power_cc1 + bpred_power_cc1)/ sim_cycle", /* format */NULL);

  stat_reg_formula(sdb, "avg_dispatch_power_cc1", "average power of dispatch unit per cycle_cc1", "(rename_power_cc1)/ sim_cycle", /* format */NULL);

  stat_reg_formula(sdb, "avg_issue_power_cc1", "average power of issue unit per cycle_cc1", "(resultbus_power_cc1 + alu_power_cc1 + dcache_power_cc1 + dcache2_power_cc1 + lsq_power_cc1 + window_power_cc1)/ sim_cycle", /* format */NULL);

  stat_reg_formula(sdb, "total_power_cycle_cc1", "total power per cycle_cc1","(rename_power_cc1 + bpred_power_cc1 + lsq_power_cc1 + window_power_cc1 + regfile_power_cc1 + icache_power_cc1 + resultbus_power_cc1 + clock_power_cc1 + alu_power_cc1 + dcache_power_cc1 + dcache2_power_cc1)", NULL);

  stat_reg_formula(sdb, "avg_total_power_cycle_cc1", "average total power per cycle_cc1","(rename_power_cc1 + bpred_power_cc1 + lsq_power_cc1 + window_power_cc1 + regfile_power_cc1 + icache_power_cc1 + resultbus_power_cc1 + clock_power_cc1 + alu_power_cc1 + dcache_power_cc1 +dcache2_power_cc1)/sim_cycle", NULL);

  stat_reg_formula(sdb, "avg_total_power_insn_cc1", "average total power per insn_cc1","(rename_power_cc1 + bpred_power_cc1 + lsq_power_cc1 + window_power_cc1 + regfile_power_cc1 + icache_power_cc1 + resultbus_power_cc1 + clock_power_cc1 +  alu_power_cc1 + dcache_power_cc1 + dcache2_power_cc1)/sim_total_insn", NULL);

  stat_reg_double(sdb, "rename_power_cc2", "total power usage of rename unit_cc2", &rename_power_cc2, 0, NULL);

  stat_reg_double(sdb, "bpred_power_cc2", "total power usage of bpred unit_cc2", &bpred_power_cc2, 0, NULL);

  stat_reg_double(sdb, "window_power_cc2", "total power usage of instruction window_cc2", &window_power_cc2, 0, NULL);

  stat_reg_double(sdb, "lsq_power_cc2", "total power usage of lsq_cc2", &lsq_power_cc2, 0, NULL);

  stat_reg_double(sdb, "regfile_power_cc2", "total power usage of arch. regfile_cc2", &regfile_power_cc2, 0, NULL);

  stat_reg_double(sdb, "icache_power_cc2", "total power usage of icache_cc2", &icache_power_cc2, 0, NULL);

  stat_reg_double(sdb, "dcache_power_cc2", "total power usage of dcache_cc2", &dcache_power_cc2, 0, NULL);

  stat_reg_double(sdb, "dcache2_power_cc2", "total power usage of dcache2_cc2", &dcache2_power_cc2, 0, NULL);

  stat_reg_double(sdb, "alu_power_cc2", "total power usage of alu_cc2", &alu_power_cc2, 0, NULL);

  stat_reg_double(sdb, "resultbus_power_cc2", "total power usage of resultbus_cc2", &resultbus_power_cc2, 0, NULL);

  stat_reg_double(sdb, "clock_power_cc2", "total power usage of clock_cc2", &clock_power_cc2, 0, NULL);

  stat_reg_formula(sdb, "avg_rename_power_cc2", "avg power usage of rename unit_cc2", "rename_power_cc2/sim_cycle", NULL);

  stat_reg_formula(sdb, "avg_bpred_power_cc2", "avg power usage of bpred unit_cc2", "bpred_power_cc2/sim_cycle", NULL);

  stat_reg_formula(sdb, "avg_window_power_cc2", "avg power usage of instruction window_cc2", "window_power_cc2/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_lsq_power_cc2", "avg power usage of instruction lsq_cc2", "lsq_power_cc2/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_regfile_power_cc2", "avg power usage of arch. regfile_cc2", "regfile_power_cc2/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_icache_power_cc2", "avg power usage of icache_cc2", "icache_power_cc2/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_dcache_power_cc2", "avg power usage of dcache_cc2", "dcache_power_cc2/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_dcache2_power_cc2", "avg power usage of dcache2_cc2", "dcache2_power_cc2/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_alu_power_cc2", "avg power usage of alu_cc2", "alu_power_cc2/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_resultbus_power_cc2", "avg power usage of resultbus_cc2", "resultbus_power_cc2/sim_cycle",  NULL);

  stat_reg_formula(sdb, "avg_clock_power_cc2", "avg power usage of clock_cc2", "clock_power_cc2/sim_cycle",  NULL);

  stat_reg_formula(sdb, "fetch_stage_power_cc2", "total power usage of fetch stage_cc2", "icache_power_cc2 + bpred_power_cc2", NULL);

  stat_reg_formula(sdb, "dispatch_stage_power_cc2", "total power usage of dispatch stage_cc2", "rename_power_cc2", NULL);

  stat_reg_formula(sdb, "issue_stage_power_cc2", "total power usage of issue stage_cc2", "resultbus_power_cc2 + alu_power_cc2 + dcache_power_cc2 + dcache2_power_cc2 + lsq_power_cc2 + window_power_cc2", NULL);

  stat_reg_formula(sdb, "avg_fetch_power_cc2", "average power of fetch unit per cycle_cc2", "(icache_power_cc2 + bpred_power_cc2)/ sim_cycle", /* format */NULL);

  stat_reg_formula(sdb, "avg_dispatch_power_cc2", "average power of dispatch unit per cycle_cc2", "(rename_power_cc2)/ sim_cycle", /* format */NULL);

  stat_reg_formula(sdb, "avg_issue_power_cc2", "average power of issue unit per cycle_cc2", "(resultbus_power_cc2 + alu_power_cc2 + dcache_power_cc2 + dcache2_power_cc2 + lsq_power_cc2 + window_power_cc2)/ sim_cycle", /* format */NULL);

  stat_reg_formula(sdb, "total_power_cycle_cc2", "total power per cycle_cc2","(rename_power_cc2 + bpred_power_cc2 + lsq_power_cc2 + window_power_cc2 + regfile_power_cc2 + icache_power_cc2 + resultbus_power_cc2 + clock_power_cc2 + alu_power_cc2 + dcache_power_cc2 + dcache2_power_cc2)", NULL);

  stat_reg_formula(sdb, "avg_total_power_cycle_cc2", "average total power per cycle_cc2","(rename_power_cc2 + bpred_power_cc2 + lsq_power_cc2 + window_power_cc2 + regfile_power_cc2 + icache_power_cc2 + resultbus_power_cc2 + clock_power_cc2 + alu_power_cc2 + dcache_power_cc2 + dcache2_power_cc2)/sim_cycle", NULL);

  stat_reg_formula(sdb, "avg_total_power_insn_cc2", "average total power per insn_cc2","(rename_power_cc2 + bpred_power_cc2 + lsq_power_cc2 + window_power_cc2 + regfile_power_cc2 + icache_power_cc2 + resultbus_power_cc2 + clock_power_cc2 + alu_power_cc2 + dcache_power_cc2 + dcache2_power_cc2)/sim_total_insn", NULL);

  stat_reg_double(sdb, "rename_power_cc3", "total power usage of rename unit_cc3", &rename_power_cc3, 0, NULL);

  stat_reg_double(sdb, "bpred_power_cc3", "total power usage of bpred unit_cc3", &bpred_power_cc3, 0, NULL);

  stat_reg_double(sdb, "window_power_cc3", "total power usage of instruction window_cc3", &window_power_cc3, 0, NULL);

  stat_reg_double(sdb, "lsq_power_cc3", "total power usage of lsq_cc3", &lsq_power_cc3, 0, NULL);

  stat_reg_double(sdb, "regfile_power_cc3", "total power usage of arch. regfile_cc3", &regfile_power_cc3, 0, NULL);

  stat_reg_double(sdb, "icache_power_cc3", "total power usage of icache_cc3", &icache_power_cc3, 0, NULL);

  stat_reg_double(sdb, "dcache_power_cc3", "total power usage of dcache_cc3", &dcache_power_cc3, 0, NULL);

  stat_reg_double(sdb, "dcache2_power_cc3", "total power usage of dcache2_cc3", &dcache2_power_cc3, 0, NULL);

  stat_reg_double(sdb, "alu_power_cc3", "total power usage of alu_cc3", &alu_power_cc3, 0, NULL);